From: Jordan Justen <jordan.l.justen@intel.com>
Date: Sat, 25 Feb 2017 10:30:06 +0000 (-0800)
Subject: i965: Initialize disk shader cache if MESA_GLSL_CACHE_DISABLE is false
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1a61a8b9a7c7cdbb42b74a76c2ec825f7107cc83;p=mesa.git

i965: Initialize disk shader cache if MESA_GLSL_CACHE_DISABLE is false

(Apologies for the double negative.)

For now, the shader cache is disabled by default on i965 to allow us
to verify its stability.

In other words, to enable the shader cache on i965, set
MESA_GLSL_CACHE_DISABLE to false or 0. If the variable is unset, then
the shader cache will be disabled.

We use the build-id of i965_dri.so for the timestamp, and the pci
device id for the device name.

v2:
 * Simplify code by forcing link to include build id sha. (Matt)

v3:
 * Don't use a for loop with snprintf for bin to hex. (Matt)
 * Assume fixed length render and timestamp string to further simplify
   code.

Cc: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
---

diff --git a/docs/relnotes/17.4.0.html b/docs/relnotes/17.4.0.html
index e4dd6bf7b70..f81b5bd62d3 100644
--- a/docs/relnotes/17.4.0.html
+++ b/docs/relnotes/17.4.0.html
@@ -44,7 +44,7 @@ Note: some of the new features are only available with certain drivers.
 </p>
 
 <ul>
-TBD
+<li>Disk shader cache support for i965 when MESA_GLSL_CACHE_DISABLE environment variable is set to "0" or "false"</li>
 </ul>
 
 <h2>Bug fixes</h2>
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index f141227bda7..037e349fdb0 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -1037,6 +1037,8 @@ brwCreateContext(gl_api api,
    vbo_use_buffer_objects(ctx);
    vbo_always_unmap_buffers(ctx);
 
+   brw_disk_cache_init(brw);
+
    return true;
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_disk_cache.c b/src/mesa/drivers/dri/i965/brw_disk_cache.c
index 73202d571f9..853ea98af03 100644
--- a/src/mesa/drivers/dri/i965/brw_disk_cache.c
+++ b/src/mesa/drivers/dri/i965/brw_disk_cache.c
@@ -26,6 +26,8 @@
 #include "compiler/glsl/shader_cache.h"
 #include "compiler/nir/nir_serialize.h"
 #include "main/mtypes.h"
+#include "util/build_id.h"
+#include "util/debug.h"
 #include "util/disk_cache.h"
 #include "util/macros.h"
 #include "util/mesa-sha1.h"
@@ -413,3 +415,29 @@ brw_disk_cache_write_compute_program(struct brw_context *brw)
                          MESA_SHADER_COMPUTE);
    }
 }
+
+void
+brw_disk_cache_init(struct brw_context *brw)
+{
+#ifdef ENABLE_SHADER_CACHE
+   if (env_var_as_boolean("MESA_GLSL_CACHE_DISABLE", true))
+      return;
+
+   char renderer[10];
+   MAYBE_UNUSED int len = snprintf(renderer, sizeof(renderer), "i965_%04x",
+                                   brw->screen->deviceID);
+   assert(len == sizeof(renderer) - 1);
+
+   const struct build_id_note *note =
+      build_id_find_nhdr_for_addr(brw_disk_cache_init);
+   assert(note && build_id_length(note) == 20 /* sha1 */);
+
+   const uint8_t *id_sha1 = build_id_data(note);
+   assert(id_sha1);
+
+   char timestamp[41];
+   _mesa_sha1_format(timestamp, id_sha1);
+
+   brw->ctx.Cache = disk_cache_create(renderer, timestamp, 0);
+#endif
+}
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index c98b7facd57..927e77920ef 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -132,6 +132,7 @@ void gen8_write_pma_stall_bits(struct brw_context *brw,
                                uint32_t pma_stall_bits);
 
 /* brw_disk_cache.c */
+void brw_disk_cache_init(struct brw_context *brw);
 bool brw_disk_cache_upload_program(struct brw_context *brw,
                                    gl_shader_stage stage);
 void brw_disk_cache_write_compute_program(struct brw_context *brw);