From: Uros Bizjak <ubizjak@gmail.com>
Date: Wed, 19 Mar 2008 23:38:35 +0000 (+0100)
Subject: re PR target/14552 (compiled trivial vector intrinsic code is inefficient)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1b1d8f8817fdc22a84c1cee4905192f15bb2df52;p=gcc.git

re PR target/14552 (compiled trivial vector intrinsic code is inefficient)

        PR target/14552
        * config/i386/mmx.md (*mov<mode>_internal_rex64"): Adjust register
        allocator preferences for "y" and "r" class registers.
        ("*mov<mode>_internal"): Ditto.
        ("*movv2sf_internal_rex64"): Ditto.
        ("*movv2sf_internal"): Ditto.

testsuite/ChangeLog:

        PR target/14552
        * gcc.target/i386/pr14552.c: New test.

From-SVN: r133354
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 19b81c42963..40870539114 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2008-03-20  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/14552
+	* config/i386/mmx.md (*mov<mode>_internal_rex64"): Adjust register
+	allocator preferences for "y" and "r" class registers.
+	("*mov<mode>_internal"): Ditto.
+	("*movv2sf_internal_rex64"): Ditto.
+	("*movv2sf_internal"): Ditto.
+
 2008-03-19  Michael Matz  <matz@suse.de>
 
 	PR middle-end/35616
@@ -586,11 +595,11 @@
 
 	PR target/35540
 	* config/i386/i386.md (paritysi2, paritydi2): Use register_operand
-	constraint for operand 1.
-	(paritysi2_cmp): Use register_operand constraint for operand 2.
+	predicate for operand 1.
+	(paritysi2_cmp): Use register_operand predicate for operand 2.
 	Use earlyclobber modifier for operand 1.  Remove support for
 	memory operands.
-	(paritydi2_cmp): Use register_operand constraint for operand 3.
+	(paritydi2_cmp): Use register_operand predicate for operand 3.
 	Use earlyclobber modifier for operand 1.  Remove support for
 	memory operands.
 
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 2238a3ffd14..a146231e992 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -65,9 +65,9 @@
 
 (define_insn "*mov<mode>_internal_rex64"
   [(set (match_operand:MMXMODEI8 0 "nonimmediate_operand"
-				"=rm,r,!y,!y ,m ,!y,Y2,x,x ,m,r,x")
+				"=rm,r,!?y,!?y ,m  ,!y,Y2,x,x ,m,r,x")
 	(match_operand:MMXMODEI8 1 "vector_move_operand"
-				"Cr ,m,C ,!ym,!y,Y2,!y,C,xm,x,x,r"))]
+				"Cr ,m,C  ,!?ym,!?y,Y2,!y,C,xm,x,x,r"))]
   "TARGET_64BIT && TARGET_MMX
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "@
@@ -89,9 +89,9 @@
 
 (define_insn "*mov<mode>_internal"
   [(set (match_operand:MMXMODEI8 0 "nonimmediate_operand"
-			"=!y,!y ,m ,!y ,*Y2,*Y2,*Y2 ,m  ,*x,*x,*x,m ,?r ,?m")
+			"=!?y,!?y,m  ,!y ,*Y2,*Y2,*Y2 ,m  ,*x,*x,*x,m ,r  ,m")
 	(match_operand:MMXMODEI8 1 "vector_move_operand"
-			"C  ,!ym,!y,*Y2,!y ,C  ,*Y2m,*Y2,C ,*x,m ,*x,irm,r"))]
+			"C   ,!ym,!?y,*Y2,!y ,C  ,*Y2m,*Y2,C ,*x,m ,*x,irm,r"))]
   "TARGET_MMX
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "@
@@ -124,9 +124,9 @@
 
 (define_insn "*movv2sf_internal_rex64"
   [(set (match_operand:V2SF 0 "nonimmediate_operand"
-				"=rm,r,!y ,!y ,m ,!y,Y2,x,x,x,m,r,x")
+				"=rm,r ,!?y,!?y ,m ,!y,Y2,x,x,x,m,r,x")
         (match_operand:V2SF 1 "vector_move_operand"
-				"Cr ,m ,C ,!ym,!y,Y2,!y,C,x,m,x,x,r"))]
+				"Cr ,m ,C  ,!?ym,!y,Y2,!y,C,x,m,x,x,r"))]
   "TARGET_64BIT && TARGET_MMX
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "@
@@ -149,9 +149,9 @@
 
 (define_insn "*movv2sf_internal"
   [(set (match_operand:V2SF 0 "nonimmediate_operand"
-			"=!y,!y ,m,!y ,*Y2,*x,*x,*x,m ,?r ,?m")
+			"=!?y,!?y ,m  ,!y ,*Y2,*x,*x,*x,m ,r  ,m")
         (match_operand:V2SF 1 "vector_move_operand"
-			"C ,!ym,!y,*Y2,!y ,C ,*x,m ,*x,irm,r"))]
+			"C   ,!?ym,!?y,*Y2,!y ,C ,*x,m ,*x,irm,r"))]
   "TARGET_MMX
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "@
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 9902a74134b..d3758f9a745 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2008-03-20  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/14552
+	* gcc.target/i386/pr14552.c: New test.
+
 2008-03-19  Michael Matz  <matz@suse.de>
 
 	PR middle-end/35616
diff --git a/gcc/testsuite/gcc.target/i386/pr14552.c b/gcc/testsuite/gcc.target/i386/pr14552.c
new file mode 100644
index 00000000000..659257c3290
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr14552.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mmmx" } */
+
+typedef short mmxw  __attribute__ ((vector_size (8)));
+typedef int   mmxdw __attribute__ ((vector_size (8)));
+
+mmxdw dw;
+mmxw w;
+
+void test()
+{
+  w+=w;
+  dw= (mmxdw)w;
+}
+
+/* { dg-final { scan-assembler-not "%mm" } } */