From: Jacob Lifshay Date: Mon, 13 Jul 2020 02:10:01 +0000 (-0700) Subject: sim.pysim: write the next, not curr signal value to the VCD file X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1b40609bf4899241567b6eec00397ee90bb423aa;p=nmigen.git sim.pysim: write the next, not curr signal value to the VCD file This is a temporary fix for #429. --- diff --git a/nmigen/sim/pysim.py b/nmigen/sim/pysim.py index 166e2a1..c50b742 100644 --- a/nmigen/sim/pysim.py +++ b/nmigen/sim/pysim.py @@ -349,7 +349,7 @@ class Simulator: for waveform_writer in self._waveform_writers: for signal_state in self._state.pending: waveform_writer.update(self._state.timeline.now, - signal_state.signal, signal_state.curr) + signal_state.signal, signal_state.next) # 2. commit: apply every queued signal change, waking up any waiting processes converged = self._state.commit()