From: Andrew Waterman Date: Tue, 12 Jul 2016 19:43:07 +0000 (-0700) Subject: Fix page table walker not respecting valid bit X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1b797b1aac81b318900bd11065eb64762f32894f;p=riscv-isa-sim.git Fix page table walker not respecting valid bit --- diff --git a/riscv/mmu.cc b/riscv/mmu.cc index 602b090..4b7166f 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -153,7 +153,7 @@ reg_t mmu_t::walk(reg_t addr, access_type type, reg_t mode) base = ppn << PGSHIFT; } else if ((pte & PTE_U) ? supervisor && pum : !supervisor) { break; - } else if (!(pte & PTE_R) && (pte & PTE_W)) { // reserved + } else if (!(pte & PTE_V) || (!(pte & PTE_R) && (pte & PTE_W))) { break; } else if (type == FETCH ? !(pte & PTE_X) : type == LOAD ? !(pte & PTE_R) && !(mxr && (pte & PTE_X)) :