From: Oliver McFadden <z3ro.geek@gmail.com>
Date: Mon, 28 May 2007 00:16:50 +0000 (+0000)
Subject: r300: Use the CP_PACKET3 macro for Type 3 packets.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1baef2f080b2afe806e9dc85a5930cb0dfb4c66e;p=mesa.git

r300: Use the CP_PACKET3 macro for Type 3 packets.

I haven't converted all of the Type 3 packets to the CP_PACKET3 macro yet
because some of the Type 3 packet defines are missing from the R300 register
definition file.

These defines need to be copied from DRM and Mesa into the R300 register
definition file then copied into both DRM and Mesa.
---

diff --git a/src/mesa/drivers/dri/r300/r300_emit.h b/src/mesa/drivers/dri/r300/r300_emit.h
index 4f841a54139..2f79ee3a23a 100644
--- a/src/mesa/drivers/dri/r300/r300_emit.h
+++ b/src/mesa/drivers/dri/r300/r300_emit.h
@@ -44,20 +44,11 @@
 #include "r300_cmdbuf.h"
 #include "radeon_reg.h"
 
-/*
- * CP type-3 packets
- */
-#define RADEON_CP_PACKET3_UNK1B                     0xC0001B00
-#define RADEON_CP_PACKET3_INDX_BUFFER               0xC0003300
-#define RADEON_CP_PACKET3_3D_DRAW_VBUF_2            0xC0003400
-#define RADEON_CP_PACKET3_3D_DRAW_IMMD_2            0xC0003500
-#define RADEON_CP_PACKET3_3D_DRAW_INDX_2            0xC0003600
-#define RADEON_CP_PACKET3_3D_LOAD_VBPNTR            0xC0002F00
-#define RADEON_CP_PACKET3_3D_CLEAR_ZMASK            0xC0003202
-#define RADEON_CP_PACKET3_3D_CLEAR_CMASK            0xC0003802
-#define RADEON_CP_PACKET3_3D_CLEAR_HIZ              0xC0003702
-
+/* TODO: move these defines (and the ones from DRM) into r300_reg.h and sync up
+ * with DRM */
 #define CP_PACKET0(reg, n)	(RADEON_CP_PACKET0 | ((n)<<16) | ((reg)>>2))
+#define CP_PACKET3( pkt, n )						\
+	(RADEON_CP_PACKET3 | (pkt) | ((n) << 16))
 
 static inline uint32_t cmdpacket0(int reg, int count)
 {
diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h
index f98af8e1d2a..3f14dafc70a 100644
--- a/src/mesa/drivers/dri/r300/r300_reg.h
+++ b/src/mesa/drivers/dri/r300/r300_reg.h
@@ -1589,6 +1589,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #    define R300_EB_UNK1_SHIFT                      24
 #    define R300_EB_UNK1                    (0x80<<24)
 #    define R300_EB_UNK2                        0x0810
+#define R300_PACKET3_3D_DRAW_VBUF_2         0x00003400
 #define R300_PACKET3_3D_DRAW_INDX_2         0x00003600
 
 /* END: Packet 3 commands */
diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c
index 0c5750de875..3dd53c65af8 100644
--- a/src/mesa/drivers/dri/r300/r300_render.c
+++ b/src/mesa/drivers/dri/r300/r300_render.c
@@ -213,14 +213,14 @@ static void r300FireEB(r300ContextPtr rmesa, unsigned long addr,
 		return;
 	}
 
-	start_packet3(RADEON_CP_PACKET3_3D_DRAW_INDX_2, 0);
+	start_packet3(CP_PACKET3(R300_PACKET3_3D_DRAW_INDX_2, 0), 0);
 	if (elt_size == 4) {
 		e32(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (vertex_count << 16) | type | R300_VAP_VF_CNTL__INDEX_SIZE_32bit);
 	} else {
 		e32(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (vertex_count << 16) | type);
 	}
 
-	start_packet3(RADEON_CP_PACKET3_INDX_BUFFER, 2);
+	start_packet3(CP_PACKET3(R300_PACKET3_INDX_BUFFER, 2), 2);
 	e32(R300_EB_UNK1 | (0 << 16) | R300_EB_UNK2);
 	e32(addr);
 
@@ -243,7 +243,7 @@ static void r300EmitAOS(r300ContextPtr rmesa, GLuint nr, GLuint offset)
 		fprintf(stderr, "%s: nr=%d, ofs=0x%08x\n", __FUNCTION__, nr,
 			offset);
 
-	start_packet3(RADEON_CP_PACKET3_3D_LOAD_VBPNTR, sz - 1);
+	start_packet3(CP_PACKET3(R300_PACKET3_3D_LOAD_VBPNTR, sz - 1), sz - 1);
 	e32(nr);
 
 	for (i = 0; i + 1 < nr; i += 2) {
@@ -269,7 +269,7 @@ static void r300FireAOS(r300ContextPtr rmesa, int vertex_count, int type)
 	int cmd_written = 0;
 	drm_radeon_cmd_header_t *cmd = NULL;
 
-	start_packet3(RADEON_CP_PACKET3_3D_DRAW_VBUF_2, 0);
+	start_packet3(CP_PACKET3(R300_PACKET3_3D_DRAW_VBUF_2, 0), 0);
 	e32(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (vertex_count << 16) | type);
 }