From: Michael Nolan <mtnolan2640@gmail.com>
Date: Mon, 27 Jan 2020 17:33:27 +0000 (-0500)
Subject: FSGNJ: Fix typo in abs
X-Git-Tag: ls180-24jan2020~325
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1bcaf99a57b35d96e9912afb2e74de80a1445ebb;p=ieee754fpu.git

FSGNJ: Fix typo in abs
---

diff --git a/src/ieee754/fsgnj/fsgnj.py b/src/ieee754/fsgnj/fsgnj.py
index 44d04580..d277e28b 100644
--- a/src/ieee754/fsgnj/fsgnj.py
+++ b/src/ieee754/fsgnj/fsgnj.py
@@ -53,7 +53,7 @@ class FSGNJPipeMod(PipeModBase):
         # here as equivalent to opcode 0b10 (i.e. a1.s XOR b1.s)
         # because this requires slightly less logic than making it the
         # same as opcode 0b00 (1 less Mux).
-        sign = Mux(opcode[1], b[-1] ^ b[-1], sign)
+        sign = Mux(opcode[1], a[-1] ^ b[-1], sign)
 
         # Create the floating point number from the sign bit
         # calculated earlier and the exponent and mantissa of operand a