From: Giacomo Travaglini Date: Mon, 2 Mar 2020 15:18:56 +0000 (+0000) Subject: misc: Make exception handling python3 compliant X-Git-Tag: v20.0.0.0~345 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1bf2821ae78139f492857e4447d9603584864baa;p=gem5.git misc: Make exception handling python3 compliant Change-Id: I37d0e97e9762e21c7a0ad315cf7684a19119b5b4 Signed-off-by: Giacomo Travaglini Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26251 Tested-by: kokoro Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power --- diff --git a/src/SConscript b/src/SConscript index 552235a66..2cdf6cb0c 100644 --- a/src/SConscript +++ b/src/SConscript @@ -382,7 +382,7 @@ class SimObject(PySource): the m5.objects package)''' super(SimObject, self).__init__('m5.objects', source, tags, add_tags) if self.fixed: - raise AttributeError, "Too late to call SimObject now." + raise AttributeError("Too late to call SimObject now.") bisect.insort_right(SimObject.modnames, self.modname) @@ -552,12 +552,12 @@ Export('GTest') debug_flags = {} def DebugFlag(name, desc=None): if name in debug_flags: - raise AttributeError, "Flag %s already specified" % name + raise AttributeError("Flag {} already specified".format(name)) debug_flags[name] = (name, (), desc) def CompoundFlag(name, flags, desc=None): if name in debug_flags: - raise AttributeError, "Flag %s already specified" % name + raise AttributeError("Flag {} already specified".format(name)) compound = tuple(flags) debug_flags[name] = (name, compound, desc) diff --git a/src/arch/arm/isa/insts/mem.isa b/src/arch/arm/isa/insts/mem.isa index 0087a24dc..0605d7bbf 100644 --- a/src/arch/arm/isa/insts/mem.isa +++ b/src/arch/arm/isa/insts/mem.isa @@ -214,7 +214,7 @@ let {{ else: memSuffix = '_ub' else: - raise Exception, "Unrecognized size for access %d" % size + raise Exception("Unrecognized size for access {}".format(size)) return memSuffix @@ -226,7 +226,7 @@ let {{ elif not post and not writeback: base = "MemoryOffset<%s>" % base else: - raise Exception, "Illegal combination of post and writeback" + raise Exception("Illegal combination of post and writeback") return base }}; diff --git a/src/arch/arm/isa/insts/mult.isa b/src/arch/arm/isa/insts/mult.isa index 2d889a11a..6885be150 100644 --- a/src/arch/arm/isa/insts/mult.isa +++ b/src/arch/arm/isa/insts/mult.isa @@ -73,8 +73,8 @@ let {{ } if not regs in (3, 4): - raise Exception, "Multiplication instructions with %d " + \ - "registers are not implemented" + raise Exception("Multiplication instructions with {} ".format( + regs) + "registers are not implemented") if regs == 3: base = 'Mult3' diff --git a/src/arch/isa_parser.py b/src/arch/isa_parser.py index ef655d3cc..b33517485 100755 --- a/src/arch/isa_parser.py +++ b/src/arch/isa_parser.py @@ -210,7 +210,7 @@ class Template(object): # if the argument is an object, we use its attribute map. myDict.update(d.__dict__) else: - raise TypeError, "Template.subst() arg must be or have dictionary" + raise TypeError("Template.subst() arg must be or have dictionary") return template % myDict # Convert to string. @@ -249,7 +249,7 @@ class Format(object): context.update({ 'name' : name, 'Name' : Name }) try: vars = self.func(self.user_code, context, *args[0], **args[1]) - except Exception, exc: + except Exception as exc: if debug: raise error(lineno, 'error defining "%s": %s.' % (name, exc)) @@ -2037,7 +2037,7 @@ del wrap # emission-in-progress. try: exec split_setup+fixPythonIndentation(t[2]) in self.exportContext - except Exception, exc: + except Exception as exc: traceback.print_exc(file=sys.stdout) if debug: raise @@ -2054,7 +2054,7 @@ del wrap 'def_operand_types : DEF OPERAND_TYPES CODELIT SEMI' try: self.operandTypeMap = eval('{' + t[3] + '}') - except Exception, exc: + except Exception as exc: if debug: raise error(t.lineno(1), @@ -2069,7 +2069,7 @@ del wrap 'error: operand types must be defined before operands') try: user_dict = eval('{' + t[3] + '}', self.exportContext) - except Exception, exc: + except Exception as exc: if debug: raise error(t.lineno(1), 'In def operands: %s' % exc) @@ -2709,7 +2709,7 @@ StaticInstPtr def parse_isa_desc(self, *args, **kwargs): try: self._parse_isa_desc(*args, **kwargs) - except ISAParserError, e: + except ISAParserError as e: print(backtrace(self.fileNameStack)) print("At %s:" % e.lineno) print(e) diff --git a/src/arch/micro_asm.py b/src/arch/micro_asm.py index 536f70994..53026c16f 100644 --- a/src/arch/micro_asm.py +++ b/src/arch/micro_asm.py @@ -123,7 +123,8 @@ def print_error(message): def handle_statement(parser, container, statement): if statement.is_microop: if statement.mnemonic not in parser.microops.keys(): - raise Exception, "Unrecognized mnemonic: %s" % statement.mnemonic + raise Exception("Unrecognized mnemonic: {}".format( + statement.mnemonic)) parser.symbols["__microopClassFromInsideTheAssembler"] = \ parser.microops[statement.mnemonic] try: @@ -144,7 +145,8 @@ def handle_statement(parser, container, statement): raise elif statement.is_directive: if statement.name not in container.directives.keys(): - raise Exception, "Unrecognized directive: %s" % statement.name + raise Exception("Unrecognized directive: {}".format( + statement.name)) parser.symbols["__directiveFunctionFromInsideTheAssembler"] = \ container.directives[statement.name] try: @@ -155,7 +157,8 @@ def handle_statement(parser, container, statement): print(container.directives) raise else: - raise Exception, "Didn't recognize the type of statement", statement + raise Exception("Didn't recognize the type of statement {}".format( + statement)) ########################################################################## # @@ -330,7 +333,7 @@ def p_rom_block(t): 'rom_block : DEF ROM block SEMI' if not t.parser.rom: print_error("Rom block found, but no Rom object specified.") - raise TypeError, "Rom block found, but no Rom object was specified." + raise TypeError("Rom block found, but no Rom object was specified.") for statement in t[3].statements: handle_statement(t.parser, t.parser.rom, statement) t[0] = t.parser.rom @@ -339,8 +342,10 @@ def p_rom_block(t): def p_macroop_def_0(t): 'macroop_def : DEF MACROOP ID LPAREN ID RPAREN SEMI' if not t.parser.rom_macroop_type: - print_error("ROM based macroop found, but no ROM macroop class was specified.") - raise TypeError, "ROM based macroop found, but no ROM macroop class was specified." + print_error("ROM based macroop found, but no ROM macroop " + + "class was specified.") + raise TypeError("ROM based macroop found, but no ROM macroop " + + "class was specified.") macroop = t.parser.rom_macroop_type(t[3], t[5]) t.parser.macroops[t[3]] = macroop diff --git a/src/arch/sparc/isa/base.isa b/src/arch/sparc/isa/base.isa index c0087d6ef..4c9bd25b7 100644 --- a/src/arch/sparc/isa/base.isa +++ b/src/arch/sparc/isa/base.isa @@ -75,7 +75,7 @@ let {{ is_dest = is_dest or is_dest_local is_src = is_src or not is_dest_local if extension and extension != op_ext: - raise Exception, "Inconsistent extensions in double filter." + raise Exception("Inconsistent extensions in double filter") extension = op_ext next_pos = match.end() if foundOne: diff --git a/src/arch/x86/isa/macroop.isa b/src/arch/x86/isa/macroop.isa index e8cf9b563..8ca176ce8 100644 --- a/src/arch/x86/isa/macroop.isa +++ b/src/arch/x86/isa/macroop.isa @@ -302,7 +302,7 @@ let {{ elif self.size == 'z': self.dataSize = "((OPSIZE == 8) ? 4 : OPSIZE)" elif self.size: - raise Exception, "Unrecognized size type %s!" % self.size + raise Exception("Unrecognized size type {}!".format(self.size)) return '''EmulEnv(%(reg)s, %(regm)s, %(dataSize)s, @@ -318,14 +318,15 @@ let {{ self.regm = reg self.regmUsed = True else: - raise Exception, "EmulEnv is out of register specialization spots." + raise Exception("EmulEnv is out of register specialization " + + "spots.") def setSize(self, size): if not self.size: self.size = size else: if self.size != size: - raise Exception, "Conflicting register sizes %s and %s!" %\ - (self.size, size) + raise Exception("Conflicting register sizes " + + "{} and {}!".format(self.size, size)) }}; let {{ @@ -334,7 +335,7 @@ let {{ def genMacroop(Name, env): blocks = OutputBlocks() if not Name in macroopDict: - raise Exception, "Unrecognized instruction: %s" % Name + raise Exception("Unrecognized instruction: {}".format(Name)) macroop = macroopDict[Name] if not macroop.declared: if env.doModRM: diff --git a/src/arch/x86/isa/microops/debug.isa b/src/arch/x86/isa/microops/debug.isa index 8615d428e..d488cdb60 100644 --- a/src/arch/x86/isa/microops/debug.isa +++ b/src/arch/x86/isa/microops/debug.isa @@ -137,7 +137,7 @@ let {{ self.once = once self.flags = flags if flags and not isinstance(flags, (list, tuple)): - raise Exception, "flags must be a list or tuple of flags" + raise Exception("flags must be a list or tuple of flags") self.className = "MicroDebugFlags" if flags else "MicroDebug" diff --git a/src/arch/x86/isa/microops/mediaop.isa b/src/arch/x86/isa/microops/mediaop.isa index 6ef263a07..488679012 100644 --- a/src/arch/x86/isa/microops/mediaop.isa +++ b/src/arch/x86/isa/microops/mediaop.isa @@ -212,9 +212,9 @@ let {{ if destSize is not None: self.destSize = destSize if self.srcSize is None: - raise Exception, "Source size not set." + raise Exception("Source size not set.") if self.destSize is None: - raise Exception, "Dest size not set." + raise Exception("Dest size not set.") if ext is None: self.ext = 0 else: diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa index d64ace4fa..06ffaea85 100644 --- a/src/arch/x86/isa/microops/regop.isa +++ b/src/arch/x86/isa/microops/regop.isa @@ -396,7 +396,7 @@ let {{ self.ext = 0 else: if not isinstance(flags, (list, tuple)): - raise Exception, "flags must be a list or tuple of flags" + raise Exception("flags must be a list or tuple of flags") self.ext = " | ".join(flags) self.className += "Flags" diff --git a/src/arch/x86/isa/microops/seqop.isa b/src/arch/x86/isa/microops/seqop.isa index f2285f6af..66b863921 100644 --- a/src/arch/x86/isa/microops/seqop.isa +++ b/src/arch/x86/isa/microops/seqop.isa @@ -122,7 +122,7 @@ let {{ self.target = target if flags: if not isinstance(flags, (list, tuple)): - raise Exception, "flags must be a list or tuple of flags" + raise Exception("flags must be a list or tuple of flags") self.cond = " | ".join(flags) self.className += "Flags" else: @@ -154,7 +154,7 @@ let {{ def __init__(self, flags=None): if flags: if not isinstance(flags, (list, tuple)): - raise Exception, "flags must be a list or tuple of flags" + raise Exception("flags must be a list or tuple of flags") self.cond = " | ".join(flags) self.className += "Flags" else: diff --git a/src/arch/x86/isa/microops/specop.isa b/src/arch/x86/isa/microops/specop.isa index 4c71bd1eb..55de0f3c2 100644 --- a/src/arch/x86/isa/microops/specop.isa +++ b/src/arch/x86/isa/microops/specop.isa @@ -162,7 +162,7 @@ let {{ self.fault = fault if flags: if not isinstance(flags, (list, tuple)): - raise Exception, "flags must be a list or tuple of flags" + raise Exception("flags must be a list or tuple of flags") self.cond = " | ".join(flags) self.className += "Flags" else: diff --git a/src/arch/x86/isa/specialize.isa b/src/arch/x86/isa/specialize.isa index 52b3e604e..946732f26 100644 --- a/src/arch/x86/isa/specialize.isa +++ b/src/arch/x86/isa/specialize.isa @@ -108,7 +108,8 @@ let {{ def __init__(self, opTypeString): match = OpType.parser.search(opTypeString) if match == None: - raise Exception, "Problem parsing operand type %s" % opTypeString + raise Exception("Problem parsing operand type {}".format( + opTypeString)) self.reg = match.group("reg") self.tag = match.group("tag") self.size = match.group("size") @@ -163,7 +164,8 @@ let {{ {"3" : (doBadInstDecode,) }, (doRipRelativeDecode, Name, opTypes, env)) elif opType.tag == None or opType.size == None: - raise Exception, "Problem parsing operand tag: %s" % opType.tag + raise Exception("Problem parsing operand tag: {}".format( + opType.tag)) elif opType.tag == "C": # A control register indexed by the "reg" field env.addReg(ModRMRegIndex) @@ -257,7 +259,7 @@ let {{ env.addressSize, false);''') Name += "_M" else: - raise Exception, "Unrecognized tag %s." % opType.tag + raise Exception("Unrecognized tag {}.".format(opType.tag)) # Generate code to return a macroop of the given name which will # operate in the "emulation environment" env diff --git a/src/mem/ruby/protocol/SConscript b/src/mem/ruby/protocol/SConscript index 958cfaa81..c037b851c 100644 --- a/src/mem/ruby/protocol/SConscript +++ b/src/mem/ruby/protocol/SConscript @@ -96,7 +96,8 @@ for path in protocol_dirs: break if not protocol_dir: - raise ValueError, "Could not find %s.slicc in protocol_dirs" % protocol + raise ValueError("Could not find {}.slicc in protocol_dirs".format( + protocol)) sources = [ protocol_dir.File("%s.slicc" % protocol) ] diff --git a/src/mem/slicc/parser.py b/src/mem/slicc/parser.py index 6e36bdafc..846a74f03 100644 --- a/src/mem/slicc/parser.py +++ b/src/mem/slicc/parser.py @@ -46,7 +46,7 @@ class SLICC(Grammar): try: self.decl_list = self.parse_file(filename, **kwargs) - except ParseError, e: + except ParseError as e: if not self.traceback: sys.exit(str(e)) raise diff --git a/src/mem/slicc/util.py b/src/mem/slicc/util.py index dcb780d6b..7afa4f88e 100644 --- a/src/mem/slicc/util.py +++ b/src/mem/slicc/util.py @@ -51,11 +51,11 @@ class PairContainer(object): class Location(object): def __init__(self, filename, lineno, no_warning=False): if not isinstance(filename, string_types): - raise AttributeError, \ - "filename must be a string, found '%s'" % (type(filename), ) - if not isinstance(lineno, (int, long)): - raise AttributeError, \ - "filename must be an integer, found '%s'" % (type(lineno), ) + raise AttributeError( + "filename must be a string, found {}".format(type(filename))) + if not isinstance(lineno, int): + raise AttributeError( + "filename must be an integer, found {}".format(type(lineno))) self.filename = filename self.lineno = lineno self.no_warning = no_warning @@ -74,7 +74,7 @@ class Location(object): def error(self, message, *args): if args: message = message % args - raise Exception, "%s: Error: %s" % (self, message) + raise Exception("{}: Error: {}".format(self, message)) sys.exit("\n%s: Error: %s" % (self, message)) __all__ = [ 'PairContainer', 'Location' ]