From: Luke Kenneth Casson Leighton Date: Tue, 2 Jul 2019 09:54:48 +0000 (+0100) Subject: replace FPBaseData with FPPipeContext class name X-Git-Tag: ls180-24jan2020~945 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1c09cdca9a8d32bcab01cce0d6333f3f91c99440;p=ieee754fpu.git replace FPBaseData with FPPipeContext class name --- diff --git a/src/ieee754/fpadd/add0.py b/src/ieee754/fpadd/add0.py index d5336b3c..5386f7d0 100644 --- a/src/ieee754/fpadd/add0.py +++ b/src/ieee754/fpadd/add0.py @@ -8,7 +8,7 @@ from nmigen.cli import main, verilog from ieee754.fpcommon.fpbase import FPNumBase, FPNumBaseRecord from ieee754.fpcommon.fpbase import FPState from ieee754.fpcommon.denorm import FPSCData -from ieee754.fpcommon.getop import FPBaseData +from ieee754.fpcommon.getop import FPPipeContext class FPAddStage0Data: @@ -18,7 +18,7 @@ class FPAddStage0Data: self.out_do_z = Signal(reset_less=True) self.oz = Signal(width, reset_less=True) self.tot = Signal(self.z.m_width + 4, reset_less=True) - self.ctx = FPBaseData(width, pspec) + self.ctx = FPPipeContext(width, pspec) self.muxid = self.ctx.muxid def eq(self, i): diff --git a/src/ieee754/fpadd/align.py b/src/ieee754/fpadd/align.py index b357e309..70ce50b6 100644 --- a/src/ieee754/fpadd/align.py +++ b/src/ieee754/fpadd/align.py @@ -10,7 +10,7 @@ from ieee754.fpcommon.fpbase import FPNumBaseRecord from ieee754.fpcommon.fpbase import MultiShiftRMerge from ieee754.fpcommon.fpbase import FPState from ieee754.fpcommon.denorm import FPSCData -from ieee754.fpcommon.getop import FPBaseData +from ieee754.fpcommon.getop import FPPipeContext class FPNumIn2Ops: @@ -21,7 +21,7 @@ class FPNumIn2Ops: self.z = FPNumBaseRecord(width, False) self.out_do_z = Signal(reset_less=True) self.oz = Signal(width, reset_less=True) - self.ctx = FPBaseData(width, pspec) + self.ctx = FPPipeContext(width, pspec) self.muxid = self.ctx.muxid def eq(self, i): diff --git a/src/ieee754/fpcommon/denorm.py b/src/ieee754/fpcommon/denorm.py index 5c20e535..6c2ed584 100644 --- a/src/ieee754/fpcommon/denorm.py +++ b/src/ieee754/fpcommon/denorm.py @@ -8,7 +8,7 @@ from math import log from ieee754.fpcommon.fpbase import FPNumIn, FPNumOut, FPNumBaseRecord from ieee754.fpcommon.fpbase import FPState, FPNumBase -from ieee754.fpcommon.getop import FPBaseData +from ieee754.fpcommon.getop import FPPipeContext class FPSCData: @@ -24,7 +24,7 @@ class FPSCData: self.z = FPNumBaseRecord(width, False) # denormed result self.oz = Signal(width, reset_less=True) # "finished" (bypass) result self.out_do_z = Signal(reset_less=True) # "bypass" enabled - self.ctx = FPBaseData(width, pspec) + self.ctx = FPPipeContext(width, pspec) self.muxid = self.ctx.muxid def __iter__(self): diff --git a/src/ieee754/fpcommon/getop.py b/src/ieee754/fpcommon/getop.py index 5ca46bfd..0100880c 100644 --- a/src/ieee754/fpcommon/getop.py +++ b/src/ieee754/fpcommon/getop.py @@ -82,7 +82,7 @@ class FPNumBase2Ops: return [self.a, self.b, self.muxid] -class FPBaseData: +class FPPipeContext: def __init__(self, width, pspec): self.width = width @@ -111,7 +111,7 @@ class FPADDBaseData: def __init__(self, width, pspec, n_ops=2): self.width = width - self.ctx = FPBaseData(width, pspec) + self.ctx = FPPipeContext(width, pspec) ops = [] for i in range(n_ops): name = chr(ord("a")+i) diff --git a/src/ieee754/fpcommon/pack.py b/src/ieee754/fpcommon/pack.py index 37ab1eca..7fe1a7c7 100644 --- a/src/ieee754/fpcommon/pack.py +++ b/src/ieee754/fpcommon/pack.py @@ -9,7 +9,7 @@ from ieee754.fpcommon.fpbase import FPNumOut, FPNumBaseRecord, FPNumBase from ieee754.fpcommon.fpbase import FPState from .roundz import FPRoundData from nmutil.singlepipe import Object -from ieee754.fpcommon.getop import FPBaseData +from ieee754.fpcommon.getop import FPPipeContext class FPPackData(Object): @@ -17,7 +17,7 @@ class FPPackData(Object): def __init__(self, width, pspec): Object.__init__(self) self.z = Signal(width, reset_less=True) # result - self.ctx = FPBaseData(width, pspec) + self.ctx = FPPipeContext(width, pspec) self.muxid = self.ctx.muxid class FPPackMod(Elaboratable): diff --git a/src/ieee754/fpcommon/postcalc.py b/src/ieee754/fpcommon/postcalc.py index 24475d38..a06c99a8 100644 --- a/src/ieee754/fpcommon/postcalc.py +++ b/src/ieee754/fpcommon/postcalc.py @@ -4,7 +4,7 @@ from nmigen import Signal from ieee754.fpcommon.fpbase import Overflow, FPNumBaseRecord -from ieee754.fpcommon.getop import FPBaseData +from ieee754.fpcommon.getop import FPPipeContext class FPAddStage1Data: @@ -13,7 +13,7 @@ class FPAddStage1Data: self.out_do_z = Signal(reset_less=True) self.oz = Signal(width, reset_less=True) self.of = Overflow() - self.ctx = FPBaseData(width, pspec) + self.ctx = FPPipeContext(width, pspec) self.muxid = self.ctx.muxid def __iter__(self): diff --git a/src/ieee754/fpcommon/postnormalise.py b/src/ieee754/fpcommon/postnormalise.py index ce7aad16..95e49174 100644 --- a/src/ieee754/fpcommon/postnormalise.py +++ b/src/ieee754/fpcommon/postnormalise.py @@ -10,7 +10,7 @@ from math import log from ieee754.fpcommon.fpbase import Overflow, FPNumBase, FPNumBaseRecord from ieee754.fpcommon.fpbase import MultiShiftRMerge from ieee754.fpcommon.fpbase import FPState -from ieee754.fpcommon.getop import FPBaseData +from ieee754.fpcommon.getop import FPPipeContext from .postcalc import FPAddStage1Data @@ -21,7 +21,7 @@ class FPNorm1Data: self.z = FPNumBaseRecord(width, False) self.out_do_z = Signal(reset_less=True) self.oz = Signal(width, reset_less=True) - self.ctx = FPBaseData(width, pspec) + self.ctx = FPPipeContext(width, pspec) self.muxid = self.ctx.muxid def eq(self, i): diff --git a/src/ieee754/fpcommon/roundz.py b/src/ieee754/fpcommon/roundz.py index ceec0c46..3aa8bf4a 100644 --- a/src/ieee754/fpcommon/roundz.py +++ b/src/ieee754/fpcommon/roundz.py @@ -7,7 +7,7 @@ from nmigen.cli import main, verilog from ieee754.fpcommon.fpbase import FPNumBase, FPNumBaseRecord from ieee754.fpcommon.fpbase import FPState -from ieee754.fpcommon.getop import FPBaseData +from ieee754.fpcommon.getop import FPPipeContext from .postnormalise import FPNorm1Data @@ -15,7 +15,7 @@ class FPRoundData: def __init__(self, width, pspec): self.z = FPNumBaseRecord(width, False) - self.ctx = FPBaseData(width, pspec) + self.ctx = FPPipeContext(width, pspec) self.muxid = self.ctx.muxid # pipeline bypass [data comes from specialcases] self.out_do_z = Signal(reset_less=True) diff --git a/src/ieee754/fpdiv/div0.py b/src/ieee754/fpdiv/div0.py index 2ad8bcda..f3f6667e 100644 --- a/src/ieee754/fpdiv/div0.py +++ b/src/ieee754/fpdiv/div0.py @@ -9,7 +9,7 @@ from nmigen.cli import main, verilog from ieee754.fpcommon.fpbase import (FPNumBaseRecord, Overflow) from ieee754.fpcommon.fpbase import FPState from ieee754.fpcommon.denorm import FPSCData -from ieee754.fpcommon.getop import FPBaseData +from ieee754.fpcommon.getop import FPPipeContext class FPDivStage0Data: @@ -20,7 +20,7 @@ class FPDivStage0Data: self.oz = Signal(width, reset_less=True) self.of = Overflow() - self.ctx = FPBaseData(width, pspec) # context: muxid, operator etc. + self.ctx = FPPipeContext(width, pspec) # context: muxid, operator etc. self.muxid = self.ctx.muxid # annoying. complicated. # TODO: here is where Q and R would be put, and passed diff --git a/src/ieee754/fpmul/mul0.py b/src/ieee754/fpmul/mul0.py index 99893efd..db89b336 100644 --- a/src/ieee754/fpmul/mul0.py +++ b/src/ieee754/fpmul/mul0.py @@ -8,7 +8,7 @@ from nmigen.cli import main, verilog from ieee754.fpcommon.fpbase import FPNumBaseRecord from ieee754.fpcommon.fpbase import FPState from ieee754.fpcommon.denorm import FPSCData -from ieee754.fpcommon.getop import FPBaseData +from ieee754.fpcommon.getop import FPPipeContext class FPMulStage0Data: @@ -19,7 +19,7 @@ class FPMulStage0Data: self.oz = Signal(width, reset_less=True) mw = (self.z.m_width)*2 - 1 + 3 # sticky/round/guard bits + (2*mant) - 1 self.product = Signal(mw, reset_less=True) - self.ctx = FPBaseData(width, pspec) + self.ctx = FPPipeContext(width, pspec) self.muxid = self.ctx.muxid def eq(self, i):