From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Fri, 30 Jan 2015 17:32:55 +0000 (+0100)
Subject: use ip model in ip_tb
X-Git-Tag: 24jan2021_ls180~2604^2~98
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1c2030d41eb7b52e24322b63068c30d5f1c99d8e;p=litex.git

use ip model in ip_tb
---

diff --git a/liteeth/__init__.py b/liteeth/__init__.py
index 25dc7259..849f2341 100644
--- a/liteeth/__init__.py
+++ b/liteeth/__init__.py
@@ -10,5 +10,5 @@ class LiteEthIPStack(Module, AutoCSR):
 		self.phy = phy
 		self.submodules.mac = mac = LiteEthMAC(phy, 8, interface="crossbar", with_hw_preamble_crc=True)
 		self.submodules.arp = arp = LiteEthARP(mac, mac_address, ip_address)
-		self.submodules.ip = ip = LiteEthIP(mac, ip_address, arp.table)
+		self.submodules.ip = ip = LiteEthIP(mac, mac_address, ip_address, arp.table)
 		self.sink, self.source = self.ip.sink, self.ip.source
diff --git a/liteeth/generic/packetizer.py b/liteeth/generic/packetizer.py
index 4fb788f1..ebd42c0c 100644
--- a/liteeth/generic/packetizer.py
+++ b/liteeth/generic/packetizer.py
@@ -50,7 +50,7 @@ class LiteEthPacketizer(Module):
 		fsm.act("SEND_HEADER",
 			source.stb.eq(1),
 			source.sop.eq(0),
-			source.eop.eq(sink.eop),
+			source.eop.eq(sink.eop & (counter.value == header_length-2)),
 			source.data.eq(header_reg[8:16]),
 			If(source.stb & source.ack,
 				shift.eq(1),
diff --git a/liteeth/ip/__init__.py b/liteeth/ip/__init__.py
index b2e37a40..1d807423 100644
--- a/liteeth/ip/__init__.py
+++ b/liteeth/ip/__init__.py
@@ -19,7 +19,7 @@ class LiteEthIPV4Packetizer(LiteEthPacketizer):
 			ipv4_header_len)
 
 class LiteEthIPTX(Module):
-	def __init__(self, ip_address, arp_table):
+	def __init__(self, mac_address, ip_address, arp_table):
 		self.sink = Sink(eth_ipv4_description(8))
 		self.source = Source(eth_mac_description(8))
 		###
@@ -28,6 +28,8 @@ class LiteEthIPTX(Module):
 		self.comb += Record.connect(self.sink, packetizer.sink)
 		sink = packetizer.source
 
+		destination_mac_address = Signal(48)
+
 		fsm = FSM(reset_state="IDLE")
 		self.submodules += fsm
 		fsm.act("IDLE",
@@ -52,19 +54,21 @@ class LiteEthIPTX(Module):
 				NextState("SEND")
 			)
 		)
+		self.sync += If(arp_table.response.stb, destination_mac_address.eq(arp_table.response.mac_address))
 		fsm.act("SEND",
 			Record.connect(packetizer.source, self.source),
+			self.source.ethernet_type.eq(ethernet_type_ip),
+			self.source.destination_mac_address.eq(destination_mac_address),
+			self.source.source_mac_address.eq(mac_address),
 			# XXX compute check sum
-
-			# XXX add timeout
-			If(arp_table.response.stb,
+			If(self.source.stb & self.source.eop & self.source.ack,
 				# XXX manage failed
-				NextState("SEND")
+				NextState("IDLE")
 			)
 		)
 
 class LiteEthIPRX(Module):
-	def __init__(self, ip_address):
+	def __init__(self, mac_address, ip_address):
 		self.sink = Sink(eth_mac_description(8))
 		self.source = source = Source(eth_ipv4_description(8))
 		###
@@ -105,9 +109,9 @@ class LiteEthIPRX(Module):
 		)
 
 class LiteEthIP(Module):
-	def __init__(self, mac, ip_address, arp_table):
-		self.submodules.tx = LiteEthIPTX(ip_address, arp_table)
-		self.submodules.rx = LiteEthIPRX(ip_address)
+	def __init__(self, mac, mac_address, ip_address, arp_table):
+		self.submodules.tx = LiteEthIPTX(mac_address, ip_address, arp_table)
+		self.submodules.rx = LiteEthIPRX(mac_address, ip_address)
 		mac_port = mac.crossbar.get_port(ethernet_type_ip)
 		self.comb += [
 			Record.connect(self.tx.source, mac_port.sink),
diff --git a/liteeth/test/ip_tb.py b/liteeth/test/ip_tb.py
index 16493595..54aee7bf 100644
--- a/liteeth/test/ip_tb.py
+++ b/liteeth/test/ip_tb.py
@@ -7,7 +7,7 @@ from liteeth.common import *
 from liteeth import LiteEthIPStack
 
 from liteeth.test.common import *
-from liteeth.test.model import phy, mac, arp
+from liteeth.test.model import phy, mac, arp, ip
 
 ip_address = 0x12345678
 mac_address = 0x12345678abcd
@@ -17,6 +17,7 @@ class TB(Module):
 		self.submodules.phy_model = phy.PHY(8, debug=True)
 		self.submodules.mac_model = mac.MAC(self.phy_model, debug=True, loopback=False)
 		self.submodules.arp_model = arp.ARP(self.mac_model, mac_address, ip_address, debug=True)
+		self.submodules.ip_model = ip.IP(self.mac_model, mac_address, ip_address, debug=True)
 
 		self.submodules.ip = LiteEthIPStack(self.phy_model, mac_address, ip_address)