From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Mon, 10 Jun 2019 10:57:10 +0000 (+0200)
Subject: cpu/vexriscv: update submodule
X-Git-Tag: 24jan2021_ls180~1172
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1c34b4a015c02076b92a594fd70278a67410b3a0;p=litex.git

cpu/vexriscv: update submodule
---

diff --git a/litex/soc/cores/cpu/vexriscv/verilog b/litex/soc/cores/cpu/vexriscv/verilog
index 4b5a515d..cfbd3e08 160000
--- a/litex/soc/cores/cpu/vexriscv/verilog
+++ b/litex/soc/cores/cpu/vexriscv/verilog
@@ -1 +1 @@
-Subproject commit 4b5a515d4bbb22df0eb44a6e53cc76b3da1ff470
+Subproject commit cfbd3e0871e1f85336c6a7adbc75f3702b365e1d