From: Eddie Hung <eddie@fpgeh.com>
Date: Wed, 15 Jan 2020 00:17:27 +0000 (-0800)
Subject: write_xaiger: do not export flop inputs as POs
X-Git-Tag: working-ls180~849^2~20
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1c41dc6b95c4c0261db96c15dd1b3cce8de6491f;p=yosys.git

write_xaiger: do not export flop inputs as POs
---

diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc
index 4f466d568..c3fc61e3b 100644
--- a/backends/aiger/xaiger.cc
+++ b/backends/aiger/xaiger.cc
@@ -226,6 +226,7 @@ struct XAigerWriter
 				}
 
 				if (inst_module) {
+					bool abc9_flop = inst_module->get_bool_attribute("\\abc9_flop");
 					auto it = cell->attributes.find("\\abc9_box_seq");
 					if (it != cell->attributes.end()) {
 						int abc9_box_seq = it->second.as_int();
@@ -233,7 +234,7 @@ struct XAigerWriter
 							box_list.resize(abc9_box_seq+1);
 						box_list[abc9_box_seq] = cell;
 						// Only flop boxes may have arrival times
-						if (!inst_module->get_bool_attribute("\\abc9_flop"))
+						if (!abc9_flop)
 							continue;
 					}
 
@@ -256,6 +257,9 @@ struct XAigerWriter
 							for (auto bit : sigmap(conn.second))
 								arrival_times[bit] = arrival;
 					}
+
+					if (abc9_flop)
+						continue;
 				}
 			}
 
@@ -591,7 +595,7 @@ struct XAigerWriter
 					// For flops only, create an extra 1-bit input that drives a new wire
 					//   called "<cell>.abc9_ff.Q" that is used below
 					if (box_module->get_bool_attribute("\\abc9_flop"))
-					    box_inputs++;
+						box_inputs++;
 
 					std::get<0>(v) = box_inputs;
 					std::get<1>(v) = box_outputs;