From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 2 Oct 2021 23:46:59 +0000 (+0100)
Subject: have to remove dcbz from pimem.py entirely
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1c425c9f29ac3dc166e01ea4e7a740ae643359e7;p=soc.git

have to remove dcbz from pimem.py entirely
---

diff --git a/src/soc/experiment/pimem.py b/src/soc/experiment/pimem.py
index 3db68c17..f9aa37df 100644
--- a/src/soc/experiment/pimem.py
+++ b/src/soc/experiment/pimem.py
@@ -258,14 +258,14 @@ class PortInterfaceBase(Elaboratable):
 
         # if now in "DCBZ" mode: wait for addr_ok, then send the address out
         # to memory, acknowledge address, and send out LD data
-        with m.If(dcbz_active.q):
+        #with m.If(dcbz_active.q):
             ##comb += Display("dcbz active")
             # XXX Please don't do it this way, not without discussion
             # the exact same address is required to be set by both
             # dcbz and stores, so use the exact same function.
             # it would be better to add an extra argument to
             # set_wr_addr to indicate "dcbz mode".
-            self.___use_wr_addr_instead_set_dcbz_addr(m, pi.addr.data)
+            #self.___use_wr_addr_instead_set_dcbz_addr(m, pi.addr.data)
 
         # if now in "ST" mode: likewise do the same but with "ST"
         # to memory, acknowledge address, and send out LD data