From: Karol Herbst <kherbst@redhat.com>
Date: Fri, 21 Aug 2020 19:37:03 +0000 (+0200)
Subject: nvc0/ir: fix load propagation for sub 4 byte addressing
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1c9efcd7a6faa2e12361f5aa3007311563792095;p=mesa.git

nvc0/ir: fix load propagation for sub 4 byte addressing

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6433>
---

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
index 727801b9d4b..d2255c2cd2b 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
@@ -387,6 +387,12 @@ TargetNVC0::insnCanLoad(const Instruction *i, int s,
       }
    }
 
+   // only loads can do sub 4 byte addressing
+   if (sf == FILE_MEMORY_CONST &&
+       (ld->getSrc(0)->reg.data.offset & 0x3)
+       && i->op != OP_LOAD)
+      return false;
+
    // not all instructions support full 32 bit immediates
    if (sf == FILE_IMMEDIATE) {
       Storage &reg = ld->getSrc(0)->asImm()->reg;