From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 19 Apr 2019 07:06:17 +0000 (+0100)
Subject: go back in vim undo history, recover itlb experimentation
X-Git-Tag: div_pipeline~2219
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1ca1accae1d1ff395b7b33bedd10a8848d925997;p=soc.git

go back in vim undo history, recover itlb experimentation
---

diff --git a/TLB/src/ariane/test_ptw.py b/TLB/src/ariane/test_ptw.py
index fd5fc0ac..1a76e50c 100644
--- a/TLB/src/ariane/test_ptw.py
+++ b/TLB/src/ariane/test_ptw.py
@@ -15,6 +15,7 @@ def testbench(dut):
     yield dut.req_port_i.data_rvalid.eq(1)
     yield dut.req_port_i.data_rdata.eq(0xc2<<56)#pte.flatten())
 
+    # data lookup
     yield dut.en_ld_st_translation_i.eq(1)
     yield dut.asid_i.eq(1)
 
@@ -44,6 +45,7 @@ def testbench(dut):
     yield
     yield
 
+    # data lookup, PTW levels 1-2-3
     addr = 0x4000000
     yield dut.dtlb_vaddr_i.eq(addr)
     yield dut.mxr_i.eq(0x1)
@@ -79,6 +81,38 @@ def testbench(dut):
     yield
     yield
 
+
+    # instruction lookup
+    yield dut.en_ld_st_translation_i.eq(0)
+    yield dut.enable_translation_i.eq(1)
+    yield dut.asid_i.eq(1)
+
+    yield dut.itlb_access_i.eq(1)
+    yield dut.itlb_hit_i.eq(0)
+    yield dut.itlb_vaddr_i.eq(0x800000)
+
+    yield
+    yield
+    yield
+
+    yield dut.itlb_access_i.eq(1)
+    yield dut.itlb_hit_i.eq(0)
+    yield dut.itlb_vaddr_i.eq(0x200000)
+
+    yield
+    yield
+    yield
+
+    yield dut.req_port_i.data_gnt.eq(0)
+    yield dut.itlb_access_i.eq(1)
+    yield dut.itlb_hit_i.eq(0)
+    yield dut.itlb_vaddr_i.eq(0x800011)
+
+    yield
+    yield dut.req_port_i.data_gnt.eq(1)
+    yield
+    yield
+
     yield