From: Bill Schmidt Date: Thu, 1 Sep 2016 14:43:55 +0000 (+0000) Subject: re PR target/72827 (gnat bootstrap broken on powerpc64le-linux-gnu) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1ca94f3674693ee3fa656a2f8c560f3bb8aa4a6e;p=gcc.git re PR target/72827 (gnat bootstrap broken on powerpc64le-linux-gnu) 2016-09-01 Bill Schmidt Michael Meissner PR target/72827 * config/rs6000/rs6000.c (rs6000_legitimize_address): Avoid reg+reg addressing for TImode. (rs6000_legitimate_address_p): Only allow register indirect addressing for TImode, even without TARGET_QUAD_MEMORY. Co-Authored-By: Michael Meissner From-SVN: r239938 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c18752b85bd..53335d916fe 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2016-09-01 Bill Schmidt + Michael Meissner + + PR target/72827 + * config/rs6000/rs6000.c (rs6000_legitimize_address): Avoid + reg+reg addressing for TImode. + (rs6000_legitimate_address_p): Only allow register indirect + addressing for TImode, even without TARGET_QUAD_MEMORY. + 2016-09-01 Richard Biener PR middle-end/77436 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 2f15a053075..557009f8099 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -8409,7 +8409,7 @@ rs6000_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, pointer, so it works with both GPRs and VSX registers. */ /* Make sure both operands are registers. */ else if (GET_CODE (x) == PLUS - && (mode != TImode || !TARGET_QUAD_MEMORY)) + && (mode != TImode || !TARGET_VSX_TIMODE)) return gen_rtx_PLUS (Pmode, force_reg (Pmode, XEXP (x, 0)), force_reg (Pmode, XEXP (x, 1))); @@ -9418,12 +9418,16 @@ rs6000_legitimate_address_p (machine_mode mode, rtx x, bool reg_ok_strict) return 1; } - /* For TImode, if we have load/store quad and TImode in VSX registers, only - allow register indirect addresses. This will allow the values to go in - either GPRs or VSX registers without reloading. The vector types would - tend to go into VSX registers, so we allow REG+REG, while TImode seems + /* For TImode, if we have TImode in VSX registers, only allow register + indirect addresses. This will allow the values to go in either GPRs + or VSX registers without reloading. The vector types would tend to + go into VSX registers, so we allow REG+REG, while TImode seems somewhat split, in that some uses are GPR based, and some VSX based. */ - if (mode == TImode && TARGET_QUAD_MEMORY && TARGET_VSX_TIMODE) + /* FIXME: We could loosen this by changing the following to + if (mode == TImode && TARGET_QUAD_MEMORY && TARGET_VSX_TIMODE) + but currently we cannot allow REG+REG addressing for TImode. See + PR72827 for complete details on how this ends up hoodwinking DSE. */ + if (mode == TImode && TARGET_VSX_TIMODE) return 0; /* If not REG_OK_STRICT (before reload) let pass any stack offset. */ if (! reg_ok_strict