From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 24 Jul 2020 13:05:53 +0000 (+0100)
Subject: call test_write_ilang only once - ends up being called 9 times otherwise
X-Git-Tag: semi_working_ecp5~573
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1cd8cae047bde859430e747d286b0bb89dbb5f14;p=soc.git

call test_write_ilang only once - ends up being called 9 times otherwise
---

diff --git a/src/soc/fu/div/test/runner.py b/src/soc/fu/div/test/runner.py
index 2513d8ec..a506c0a8 100644
--- a/src/soc/fu/div/test/runner.py
+++ b/src/soc/fu/div/test/runner.py
@@ -72,21 +72,15 @@ class DivRunner(unittest.TestCase):
         self.test_data = test_data
         self.div_pipe_kind = div_pipe_kind
 
-    def write_ilang(self, div_pipe_kind):
-        pspec = DivPipeSpec(id_wid=2, div_pipe_kind=div_pipe_kind)
+    def write_ilang(self):
+        pspec = DivPipeSpec(id_wid=2, div_pipe_kind=self.div_pipe_kind)
         alu = DivBasePipe(pspec)
         vl = rtlil.convert(alu, ports=alu.ports())
         with open(f"div_pipeline_{div_pipe_kind.name}.il", "w") as f:
             f.write(vl)
 
-    def test_write_ilang_div_pipe_core(self):
-        self.write_ilang(DivPipeKind.DivPipeCore)
-
-    def test_write_ilang_fsm_div_core(self):
-        self.write_ilang(DivPipeKind.FSMDivCore)
-
-    def test_write_ilang_sim_only(self):
-        self.write_ilang(DivPipeKind.SimOnly)
+    def test_write_ilang(self):
+        self.write_ilang(self.div_pipe_kind)
 
     def run_all(self):
         # *sigh* this is a mess.  unit test gets added by code-walking