From: Giacomo Travaglini Date: Fri, 17 Jul 2020 13:27:19 +0000 (+0100) Subject: dev-arm: Remove SPI/PPI range check in Gicv3 class X-Git-Tag: v20.1.0.0~413 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1ce70838209899d3479f48d624e1fed3567c0475;p=gem5.git dev-arm: Remove SPI/PPI range check in Gicv3 class This is not needed since the check will already happen within * Gicv3Distributor::sendInt * Gicv3Redistributor::sendPPInt Change-Id: I1355bde367127513f0501aa19e8f68d302c7a4f4 Signed-off-by: Giacomo Travaglini Reviewed-by: Nikos Nikoleris Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31514 Reviewed-by: Andreas Sandberg Maintainer: Andreas Sandberg Tested-by: kokoro --- diff --git a/src/dev/arm/gic_v3.cc b/src/dev/arm/gic_v3.cc index b4046017a..575194004 100644 --- a/src/dev/arm/gic_v3.cc +++ b/src/dev/arm/gic_v3.cc @@ -172,8 +172,6 @@ Gicv3::write(PacketPtr pkt) void Gicv3::sendInt(uint32_t int_id) { - panic_if(int_id < Gicv3::SGI_MAX + Gicv3::PPI_MAX, "Invalid SPI!"); - panic_if(int_id >= Gicv3::INTID_SECURE, "Invalid SPI!"); DPRINTF(Interrupt, "Gicv3::sendInt(): received SPI %d\n", int_id); distributor->sendInt(int_id); } @@ -188,8 +186,6 @@ void Gicv3::sendPPInt(uint32_t int_id, uint32_t cpu) { panic_if(cpu >= redistributors.size(), "Invalid cpuID sending PPI!"); - panic_if(int_id < Gicv3::SGI_MAX, "Invalid PPI!"); - panic_if(int_id >= Gicv3::SGI_MAX + Gicv3::PPI_MAX, "Invalid PPI!"); DPRINTF(Interrupt, "Gicv3::sendPPInt(): received PPI %d cpuTarget %#x\n", int_id, cpu); redistributors[cpu]->sendPPInt(int_id);