From: Florent Kermarrec Date: Tue, 23 Jul 2019 18:35:28 +0000 (+0200) Subject: soc_core: round memory regions size/length to next power of 2 (if not already a power... X-Git-Tag: 24jan2021_ls180~1081 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1cfb36e1e4b201cf05eb7d7988026af2c4a00d9c;p=litex.git soc_core: round memory regions size/length to next power of 2 (if not already a power of 2) --- diff --git a/litex/soc/integration/soc_core.py b/litex/soc/integration/soc_core.py index 3e5a59fd..744225db 100644 --- a/litex/soc/integration/soc_core.py +++ b/litex/soc/integration/soc_core.py @@ -98,6 +98,7 @@ def get_mem_data(filename_or_regions, endianness="big", mem_size=None): def mem_decoder(address, size=0x10000000): address &= ~0x80000000 + size = 2**log2_int(size, False) assert (address & (size - 1)) == 0 address >>= 2 # bytes to words aligned size >>= 2 # bytes to words aligned @@ -431,6 +432,7 @@ class SoCCore(Module): def in_this_region(addr): return addr >= origin and addr < origin + length for n, o, l in self._memory_regions: + l = 2**log2_int(l, False) if n == name or in_this_region(o) or in_this_region(o+l-1): raise ValueError("Memory region conflict between {} and {}".format(n, name))