From: lkcl <lkcl@web>
Date: Sun, 31 Jul 2022 14:13:18 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~933
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1d4bc8265048d18aad92826eea19ffe86a716f8c;p=libreriscv.git

---

diff --git a/openpower/sv/vector_ops.mdwn b/openpower/sv/vector_ops.mdwn
index ab71f91c0..310767b0d 100644
--- a/openpower/sv/vector_ops.mdwn
+++ b/openpower/sv/vector_ops.mdwn
@@ -58,6 +58,9 @@ for Scalable Vector usage as Predicate Masks, is the second mask parameter
 by RB unaltered, otherwise those bits are set to zero. Note that when `RB=0`
 then instead of reading from the register file the mask is set to all ones.
 
+The lower two bits of `bm` set to 0b11 are `RESERVED`. An illegal instruction
+trap must be raised.
+
 Executable pseudocode demo:
 
 ```