From: lkcl <lkcl@web>
Date: Sun, 5 Sep 2021 13:12:34 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~236
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1d518a1a00202e8bef7f84a9a52c1d9515a76c55;p=libreriscv.git

---

diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn
index acc973725..9354957b8 100644
--- a/openpower/sv/ldst.mdwn
+++ b/openpower/sv/ldst.mdwn
@@ -45,6 +45,8 @@ a number of different modes:
 * fail-first on the same (where it makes sense to do so)
 * Structure Packing (covered in SV by [[sv/remap]]).
 
+# Vectorisation of Scalar Power ISA v3.0B
+
 OpenPOWER Load/Store operations may be seen from [[isa/fixedload]] and
 [[isa/fixedstore]] pseudocode to be of the form: