From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 9 Mar 2022 16:43:34 +0000 (+0000)
Subject: add x86 virtual memory links
X-Git-Tag: opf_rfc_ls005_v1~3109
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1dbf67ec3cd4898a2eb47600fae77b46e4168ecc;p=libreriscv.git

add x86 virtual memory links
---

diff --git a/resources.mdwn b/resources.mdwn
index ae392ed32..42851192d 100644
--- a/resources.mdwn
+++ b/resources.mdwn
@@ -536,4 +536,6 @@ This list auto-generated from a page tag "standards":
      OpenTitan also uses FuseSoC
      LowRISC is UK based
      https://antmicro.com/blog/2020/12/ibex-support-in-verilator-yosys-via-uhdm-surelog/
+    https://cirosantilli.com/x86-paging
+    http://denninginstitute.com/modules/vm/red/i486page.html
 ```