From: Eddie Hung <eddie@fpgeh.com>
Date: Mon, 7 Oct 2019 19:21:52 +0000 (-0700)
Subject: Remove -D_ABC9
X-Git-Tag: working-ls180~881^2^2~174
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1dc22607c38486d9e1a2b56f749d1eca35d405d2;p=yosys.git

Remove -D_ABC9
---

diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index 07f3d9a8a..a99aef7c7 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -286,8 +286,6 @@ struct SynthXilinxPass : public ScriptPass
 			std::string read_args;
 			if (vpr)
 				read_args += " -D_EXPLICIT_CARRY";
-			if (abc9)
-				read_args += " -D_ABC9";
 			read_args += " -lib +/xilinx/cells_sim.v";
 			run("read_verilog" + read_args);