From: Plamena Manolova Date: Wed, 23 Oct 2019 19:56:45 +0000 (+0100) Subject: iris: Add support for depth bounds testing. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1df871f8ff753dd234def380ea0e20d7e81cad9e;p=mesa.git iris: Add support for depth bounds testing. In gen12 we use the 3DSTATE_DEPTH_BOUNDS instruction to enable depth bounds testing. Signed-off-by: Plamena Manolova Reviewed-by: Kenneth Graunke --- diff --git a/src/gallium/drivers/iris/iris_context.h b/src/gallium/drivers/iris/iris_context.h index 6833d360fb1..70279a6a91f 100644 --- a/src/gallium/drivers/iris/iris_context.h +++ b/src/gallium/drivers/iris/iris_context.h @@ -135,6 +135,7 @@ enum { #define IRIS_DIRTY_COMPUTE_RESOLVES_AND_FLUSHES (1ull << 56) #define IRIS_DIRTY_VF_STATISTICS (1ull << 57) #define IRIS_DIRTY_PMA_FIX (1ull << 58) +#define IRIS_DIRTY_DEPTH_BOUNDS (1ull << 59) #define IRIS_ALL_DIRTY_FOR_COMPUTE (IRIS_DIRTY_CS | \ IRIS_DIRTY_SAMPLER_STATES_CS | \ diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index c56413b268d..e2c36152b97 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -1278,6 +1278,10 @@ struct iris_depth_stencil_alpha_state { /** Partial 3DSTATE_WM_DEPTH_STENCIL. */ uint32_t wmds[GENX(3DSTATE_WM_DEPTH_STENCIL_length)]; +#if GEN_GEN >= 12 + uint32_t depth_bounds[GENX(3DSTATE_DEPTH_BOUNDS_length)]; +#endif + /** Outbound to BLEND_STATE, 3DSTATE_PS_BLEND, COLOR_CALC_STATE. */ struct pipe_alpha_state alpha; @@ -1340,6 +1344,16 @@ iris_create_zsa_state(struct pipe_context *ctx, /* wmds.[Backface]StencilReferenceValue are merged later */ } +#if GEN_GEN >= 12 + iris_pack_command(GENX(3DSTATE_DEPTH_BOUNDS), cso->depth_bounds, depth_bounds) { + depth_bounds.DepthBoundsTestValueModifyDisable = false; + depth_bounds.DepthBoundsTestEnableModifyDisable = false; + depth_bounds.DepthBoundsTestEnable = state->depth.bounds_test; + depth_bounds.DepthBoundsTestMinValue = state->depth.bounds_min; + depth_bounds.DepthBoundsTestMaxValue = state->depth.bounds_max; + } +#endif + return cso; } @@ -1370,6 +1384,11 @@ iris_bind_zsa_state(struct pipe_context *ctx, void *state) ice->state.depth_writes_enabled = new_cso->depth_writes_enabled; ice->state.stencil_writes_enabled = new_cso->stencil_writes_enabled; + +#if GEN_GEN >= 12 + if (cso_changed(depth_bounds)) + ice->state.dirty |= IRIS_DIRTY_DEPTH_BOUNDS; +#endif } ice->state.cso_zsa = new_cso; @@ -5556,6 +5575,10 @@ iris_upload_dirty_render_state(struct iris_context *ice, #else iris_batch_emit(batch, cso->wmds, sizeof(cso->wmds)); #endif + +#if GEN_GEN >= 12 + iris_batch_emit(batch, cso->depth_bounds, sizeof(cso->depth_bounds)); +#endif } if (dirty & IRIS_DIRTY_SCISSOR_RECT) {