From: H.J. Lu <hjl.tools@gmail.com>
Date: Fri, 14 Nov 2014 16:31:37 +0000 (-0800)
Subject: Correct x86 assembler manual
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1dfc6506b7482baf86dbb3c91de5bd2ae3f5acda;p=binutils-gdb.git

Correct x86 assembler manual

	* config/tc-i386.c (cpu_arch): Re-arrange avx512* and xsave*
	items.

	* doc/c-i386.texi: Re-arrange avx512* and xsave*.  Add
	clflushopt and se1.  Remove duplicated entries.
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 85a03aac5bb..548fe396511 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,11 @@
+2014-11-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (cpu_arch): Re-arrange avx512* and xsave*
+	items.
+
+	* doc/c-i386.texi: Re-arrange avx512* and xsave*.  Add
+	clflushopt and se1.  Remove duplicated entries.
+
 2014-11-13  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 
 	* config/tc-aarch64.c (aarch64_cpus): Add CRC feature for
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index f54f077e4cf..1f9b3463e53 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -827,6 +827,12 @@ static const arch_entry cpu_arch[] =
     CPU_AVX512ER_FLAGS, 0, 0 },
   { STRING_COMMA_LEN (".avx512pf"), PROCESSOR_UNKNOWN,
     CPU_AVX512PF_FLAGS, 0, 0 },
+  { STRING_COMMA_LEN (".avx512dq"), PROCESSOR_UNKNOWN,
+    CPU_AVX512DQ_FLAGS, 0, 0 },
+  { STRING_COMMA_LEN (".avx512bw"), PROCESSOR_UNKNOWN,
+    CPU_AVX512BW_FLAGS, 0, 0 },
+  { STRING_COMMA_LEN (".avx512vl"), PROCESSOR_UNKNOWN,
+    CPU_AVX512VL_FLAGS, 0, 0 },
   { STRING_COMMA_LEN (".noavx"), PROCESSOR_UNKNOWN,
     CPU_ANY_AVX_FLAGS, 0, 1 },
   { STRING_COMMA_LEN (".vmx"), PROCESSOR_UNKNOWN,
@@ -839,6 +845,10 @@ static const arch_entry cpu_arch[] =
     CPU_XSAVE_FLAGS, 0, 0 },
   { STRING_COMMA_LEN (".xsaveopt"), PROCESSOR_UNKNOWN,
     CPU_XSAVEOPT_FLAGS, 0, 0 },
+  { STRING_COMMA_LEN (".xsavec"), PROCESSOR_UNKNOWN,
+    CPU_XSAVEC_FLAGS, 0, 0 },
+  { STRING_COMMA_LEN (".xsaves"), PROCESSOR_UNKNOWN,
+    CPU_XSAVES_FLAGS, 0, 0 },
   { STRING_COMMA_LEN (".aes"), PROCESSOR_UNKNOWN,
     CPU_AES_FLAGS, 0, 0 },
   { STRING_COMMA_LEN (".pclmul"), PROCESSOR_UNKNOWN,
@@ -915,20 +925,10 @@ static const arch_entry cpu_arch[] =
     CPU_SHA_FLAGS, 0, 0 },
   { STRING_COMMA_LEN (".clflushopt"), PROCESSOR_UNKNOWN,
     CPU_CLFLUSHOPT_FLAGS, 0, 0 },
-  { STRING_COMMA_LEN (".xsavec"), PROCESSOR_UNKNOWN,
-    CPU_XSAVEC_FLAGS, 0, 0 },
-  { STRING_COMMA_LEN (".xsaves"), PROCESSOR_UNKNOWN,
-    CPU_XSAVES_FLAGS, 0, 0 },
   { STRING_COMMA_LEN (".prefetchwt1"), PROCESSOR_UNKNOWN,
     CPU_PREFETCHWT1_FLAGS, 0, 0 },
   { STRING_COMMA_LEN (".se1"), PROCESSOR_UNKNOWN,
     CPU_SE1_FLAGS, 0, 0 },
-  { STRING_COMMA_LEN (".avx512dq"), PROCESSOR_UNKNOWN,
-    CPU_AVX512DQ_FLAGS, 0, 0 },
-  { STRING_COMMA_LEN (".avx512bw"), PROCESSOR_UNKNOWN,
-    CPU_AVX512BW_FLAGS, 0, 0 },
-  { STRING_COMMA_LEN (".avx512vl"), PROCESSOR_UNKNOWN,
-    CPU_AVX512VL_FLAGS, 0, 0 },
 };
 
 #ifdef I386COFF
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 75cd6b14838..440f3751b08 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -151,16 +151,24 @@ accept various extension mnemonics.  For example,
 @code{smap},
 @code{mpx},
 @code{sha},
+@code{prefetchwt1},
+@code{clflushopt},
+@code{se1},
 @code{avx512f},
 @code{avx512cd},
 @code{avx512er},
 @code{avx512pf},
+@code{avx512vl},
+@code{avx512bw},
+@code{avx512dq},
 @code{noavx},
 @code{vmx},
 @code{vmfunc},
 @code{smx},
 @code{xsave},
 @code{xsaveopt},
+@code{xsavec},
+@code{xsaves},
 @code{aes},
 @code{pclmul},
 @code{fsgsbase},
@@ -188,9 +196,6 @@ accept various extension mnemonics.  For example,
 @code{svme},
 @code{abm} and
 @code{padlock}.
-@code{avx512dq},
-@code{avx512bw},
-@code{avx512vl},
 Note that rather than extending a basic instruction set, the extension
 mnemonics starting with @code{no} revoke the respective functionality.
 
@@ -1094,20 +1099,14 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.rdrnd} @tab @samp{.f16c} @tab @samp{.avx2} @tab @samp{.bmi2}
 @item @samp{.lzcnt} @tab @samp{.invpcid} @tab @samp{.vmfunc} @tab @samp{.hle}
 @item @samp{.rtm} @tab @samp{.adx} @tab @samp{.rdseed} @tab @samp{.prfchw}
-@item @samp{.smap} @tab @samp{.mpx}
-@item @samp{.smap} @tab @samp{.sha}
-@item @samp{.smap} @tab @samp{.clflushopt} @tab @samp{.xsavec} @tab @samp{.xsaves}
-@item @samp{.smap} @tab @samp{.prefetchwt1}
-@item @samp{.smap} @tab @samp{.avx512vl} @tab @samp{.avx512bw} @tab @samp{.avx512dq}
+@item @samp{.smap} @tab @samp{.mpx} @tab @samp{.sha} @tab @samp{.prefetchwt1}
+@item @samp{.clflushopt} @tab @samp{.xsavec} @tab @samp{.xsaves} @tab @samp{.se1}
+@item @samp{.avx512f} @tab @samp{.avx512cd} @tab @samp{.avx512er} @tab @samp{.avx512pf}
+@item @samp{.avx512vl} @tab @samp{.avx512bw} @tab @samp{.avx512dq}
 @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
 @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
 @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}
 @item @samp{.padlock}
-@item @samp{.smap} @tab @samp{.avx512f} @tab @samp{.avx512cd} @tab @samp{.avx512er}
-@item @samp{.avx512pf} @tab @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a}
-@item @samp{.sse5} @tab @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme}
-@item @samp{.abm} @tab @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop}
-@item @samp{.cx16} @tab @samp{.padlock}
 @end multitable
 
 Apart from the warning, there are only two other effects on