From: Kyrylo Tkachov Date: Thu, 21 May 2015 13:30:24 +0000 (+0000) Subject: Testsuite check for sqrt_insn. Move pow/sqrt synth test from gcc.target/aarch64/... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1e43cc9461ba4f73939c94f07d2f5b305943eb29;p=gcc.git Testsuite check for sqrt_insn. Move pow/sqrt synth test from gcc.target/aarch64/ to to gcc.dg/ * lib/target-supports.exp (check_effective_target_sqrt_insn): New check. * gcc.dg/pow-sqrt-synth-1.c: New test. * gcc.target/aarch64/pow-sqrt-synth-1.c: Delete. * doc/sourcebuild.texi (7.2.3.9 Other hardware attributes): Document sqrt_insn. From-SVN: r223485 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index af2225b1595..46784af7235 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2015-05-21 Kyrylo Tkachov + + * doc/sourcebuild.texi (7.2.3.9 Other hardware attributes): + Document sqrt_insn. + 2015-05-21 Richard Biener PR c++/66211 diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index c6ef40e5db7..abe07799f33 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -1695,6 +1695,9 @@ Target supports FPU instructions. @item non_strict_align Target does not require strict alignment. +@item sqrt_insn +Target has a square root instruction that the compiler can generate. + @item sse Target supports compiling @code{sse} instructions. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e6814533848..a5b78aa738e 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2015-05-21 Kyrylo Tkachov + + * lib/target-supports.exp (check_effective_target_sqrt_insn): New check. + * gcc.dg/pow-sqrt-synth-1.c: New test. + * gcc.target/aarch64/pow-sqrt-synth-1.c: Delete. + 2015-05-21 Richard Biener PR c++/66211 diff --git a/gcc/testsuite/gcc.dg/pow-sqrt-synth-1.c b/gcc/testsuite/gcc.dg/pow-sqrt-synth-1.c new file mode 100644 index 00000000000..d55b6263438 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pow-sqrt-synth-1.c @@ -0,0 +1,38 @@ +/* { dg-do compile { target sqrt_insn } } */ +/* { dg-options "-fdump-tree-sincos -Ofast --param max-pow-sqrt-depth=8" } */ +/* { dg-additional-options "-mfloat-abi=softfp -mfpu=neon-vfpv4" { target arm*-*-* } } */ + +double +foo (double a) +{ + return __builtin_pow (a, -5.875); +} + +double +foof (double a) +{ + return __builtin_pow (a, 0.75f); +} + +double +bar (double a) +{ + return __builtin_pow (a, 1.0 + 0.00390625); +} + +double +baz (double a) +{ + return __builtin_pow (a, -1.25) + __builtin_pow (a, 5.75) - __builtin_pow (a, 3.375); +} + +#define N 256 +void +vecfoo (double *a) +{ + for (int i = 0; i < N; i++) + a[i] = __builtin_pow (a[i], 1.25); +} + +/* { dg-final { scan-tree-dump-times "synthesizing" 7 "sincos" } } */ +/* { dg-final { cleanup-tree-dump "sincos" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/pow-sqrt-synth-1.c b/gcc/testsuite/gcc.target/aarch64/pow-sqrt-synth-1.c deleted file mode 100644 index 52514fb23b1..00000000000 --- a/gcc/testsuite/gcc.target/aarch64/pow-sqrt-synth-1.c +++ /dev/null @@ -1,38 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-fdump-tree-sincos -Ofast --param max-pow-sqrt-depth=8" } */ - - -double -foo (double a) -{ - return __builtin_pow (a, -5.875); -} - -double -foof (double a) -{ - return __builtin_pow (a, 0.75f); -} - -double -bar (double a) -{ - return __builtin_pow (a, 1.0 + 0.00390625); -} - -double -baz (double a) -{ - return __builtin_pow (a, -1.25) + __builtin_pow (a, 5.75) - __builtin_pow (a, 3.375); -} - -#define N 256 -void -vecfoo (double *a) -{ - for (int i = 0; i < N; i++) - a[i] = __builtin_pow (a[i], 1.25); -} - -/* { dg-final { scan-tree-dump-times "synthesizing" 7 "sincos" } } */ -/* { dg-final { cleanup-tree-dump "sincos" } } */ \ No newline at end of file diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 732f718829b..f0c209fc702 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -4670,6 +4670,27 @@ proc check_effective_target_vect_call_copysignf { } { return $et_vect_call_copysignf_saved } +# Return 1 if the target supports hardware square root instructions. + +proc check_effective_target_sqrt_insn { } { + global et_sqrt_insn_saved + + if [info exists et_sqrt_insn_saved] { + verbose "check_effective_target_hw_sqrt: using cached result" 2 + } else { + set et_sqrt_insn_saved 0 + if { [istarget x86_64-*-*] + || [istarget powerpc*-*-*] + || [istarget aarch64*-*-*] + || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } { + set et_sqrt_insn_saved 1 + } + } + + verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2 + return $et_sqrt_insn_saved +} + # Return 1 if the target supports vector sqrtf calls. proc check_effective_target_vect_call_sqrtf { } {