From: Sebastien Bourdeauducq <sebastien@milkymist.org>
Date: Tue, 12 Mar 2013 15:13:20 +0000 (+0100)
Subject: build.py: use implicit get_fragment
X-Git-Tag: 24jan2021_ls180~3032
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1e7783a41e0a6639094967432e5c34d1ddc9e17a;p=litex.git

build.py: use implicit get_fragment
---

diff --git a/build.py b/build.py
index 81539374..ef125678 100755
--- a/build.py
+++ b/build.py
@@ -58,7 +58,7 @@ NET "asfifo*/preset_empty*" TIG;
 		"jtag_tap_spartan6.v", "lm32_itlb.v", "lm32_dtlb.v")
 	plat.add_sources(os.path.join("verilog", "lm32"), "lm32_config.v")
 	
-	plat.build_cmdline(soc.get_fragment(), clock_domains=soc.crg.get_clock_domains())
+	plat.build_cmdline(soc, clock_domains=soc.crg.get_clock_domains())
 
 if __name__ == "__main__":
 	main()