From: Kevin Lim <ktlim@umich.edu>
Date: Fri, 4 Feb 2005 23:25:49 +0000 (-0500)
Subject: Hand merge
X-Git-Tag: m5_1.0_tutorial~76^2~7
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1e7a744c09d0bde70e0f83179fdf4d6059585e4b;p=gem5.git

Hand merge

--HG--
extra : convert_revision : 86c7399b79c17558041a73056745227f70fe8b3b
---

1e7a744c09d0bde70e0f83179fdf4d6059585e4b
diff --cc base/traceflags.py
index 1f69e5e88,ef13d9e2a..d1eb4478a
--- a/base/traceflags.py
+++ b/base/traceflags.py
@@@ -154,8 -139,8 +154,9 @@@ compoundFlagMap = 
      'ScsiAll' : [ 'ScsiDisk', 'ScsiCtrl', 'ScsiNone' ],
      'DiskImageAll' : [ 'DiskImage', 'DiskImageRead', 'DiskImageWrite' ],
      'EthernetAll' : [ 'Ethernet', 'EthernetPIO', 'EthernetDMA', 'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ],
+     'EthernetNoData' : [ 'Ethernet', 'EthernetPIO', 'EthernetDesc', 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ],
 -    'IdeAll' : [ 'IdeCtrl', 'IdeDisk' ]
 +    'IdeAll' : [ 'IdeCtrl', 'IdeDisk' ],
 +    'FullCPUAll' : [ 'Fetch', 'Decode', 'Rename', 'IEW', 'Commit', 'IQ', 'ROB', 'FreeList', 'RenameMap', 'LDSTQ', 'StoreSet', 'MemDepUnit', 'DynInst', 'FullCPU']
  }
  
  #############################################################