From: Jason Ekstrand Date: Fri, 19 Jan 2018 23:02:07 +0000 (-0800) Subject: intel/blorp: Use isl_aux_op instead of blorp_fast_clear_op X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1e941a05283b6873d2501f17944e545f6c76166f;p=mesa.git intel/blorp: Use isl_aux_op instead of blorp_fast_clear_op Reviewed-by: Topi Pohjolainen Reviewed-by: Nanley Chery --- diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h index 478a9af5ed1..f1be12ba91e 100644 --- a/src/intel/blorp/blorp.h +++ b/src/intel/blorp/blorp.h @@ -189,19 +189,12 @@ blorp_clear_attachments(struct blorp_batch *batch, bool clear_depth, float depth_value, uint8_t stencil_mask, uint8_t stencil_value); -enum blorp_fast_clear_op { - BLORP_FAST_CLEAR_OP_NONE = 0, - BLORP_FAST_CLEAR_OP_CLEAR, - BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL, - BLORP_FAST_CLEAR_OP_RESOLVE_FULL, -}; - void blorp_ccs_resolve(struct blorp_batch *batch, struct blorp_surf *surf, uint32_t level, uint32_t start_layer, uint32_t num_layers, enum isl_format format, - enum blorp_fast_clear_op resolve_op); + enum isl_aux_op resolve_op); void blorp_ccs_ambiguate(struct blorp_batch *batch, diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c index 165dbca8c79..d205e5becae 100644 --- a/src/intel/blorp/blorp_clear.c +++ b/src/intel/blorp/blorp_clear.c @@ -322,7 +322,7 @@ blorp_fast_clear(struct blorp_batch *batch, params.y1 = y1; memset(¶ms.wm_inputs.clear_color, 0xff, 4*sizeof(float)); - params.fast_clear_op = BLORP_FAST_CLEAR_OP_CLEAR; + params.fast_clear_op = ISL_AUX_OP_FAST_CLEAR; get_fast_clear_rect(batch->blorp->isl_dev, surf->aux_surf, ¶ms.x0, ¶ms.y0, ¶ms.x1, ¶ms.y1); @@ -720,7 +720,7 @@ blorp_ccs_resolve(struct blorp_batch *batch, struct blorp_surf *surf, uint32_t level, uint32_t start_layer, uint32_t num_layers, enum isl_format format, - enum blorp_fast_clear_op resolve_op) + enum isl_aux_op resolve_op) { struct blorp_params params; @@ -759,11 +759,11 @@ blorp_ccs_resolve(struct blorp_batch *batch, params.y1 = ALIGN(params.y1, y_scaledown) / y_scaledown; if (batch->blorp->isl_dev->info->gen >= 9) { - assert(resolve_op == BLORP_FAST_CLEAR_OP_RESOLVE_FULL || - resolve_op == BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL); + assert(resolve_op == ISL_AUX_OP_FULL_RESOLVE || + resolve_op == ISL_AUX_OP_PARTIAL_RESOLVE); } else { /* Broadwell and earlier do not have a partial resolve */ - assert(resolve_op == BLORP_FAST_CLEAR_OP_RESOLVE_FULL); + assert(resolve_op == ISL_AUX_OP_FULL_RESOLVE); } params.fast_clear_op = resolve_op; params.num_layers = num_layers; diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index 1968460be05..8d007b818ad 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++ b/src/intel/blorp/blorp_genX_exec.h @@ -750,21 +750,21 @@ blorp_emit_ps_config(struct blorp_batch *batch, ps.MaximumNumberofThreadsPerPSD = 64 - 2; switch (params->fast_clear_op) { - case BLORP_FAST_CLEAR_OP_NONE: + case ISL_AUX_OP_NONE: break; #if GEN_GEN >= 9 - case BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL: + case ISL_AUX_OP_PARTIAL_RESOLVE: ps.RenderTargetResolveType = RESOLVE_PARTIAL; break; - case BLORP_FAST_CLEAR_OP_RESOLVE_FULL: + case ISL_AUX_OP_FULL_RESOLVE: ps.RenderTargetResolveType = RESOLVE_FULL; break; #else - case BLORP_FAST_CLEAR_OP_RESOLVE_FULL: + case ISL_AUX_OP_FULL_RESOLVE: ps.RenderTargetResolveEnable = true; break; #endif - case BLORP_FAST_CLEAR_OP_CLEAR: + case ISL_AUX_OP_FAST_CLEAR: ps.RenderTargetFastClearEnable = true; break; default: @@ -852,12 +852,12 @@ blorp_emit_ps_config(struct blorp_batch *batch, ps.SamplerCount = 1; /* Up to 4 samplers */ switch (params->fast_clear_op) { - case BLORP_FAST_CLEAR_OP_NONE: + case ISL_AUX_OP_NONE: break; - case BLORP_FAST_CLEAR_OP_RESOLVE_FULL: + case ISL_AUX_OP_FULL_RESOLVE: ps.RenderTargetResolveEnable = true; break; - case BLORP_FAST_CLEAR_OP_CLEAR: + case ISL_AUX_OP_FAST_CLEAR: ps.RenderTargetFastClearEnable = true; break; default: diff --git a/src/intel/blorp/blorp_priv.h b/src/intel/blorp/blorp_priv.h index faa0af10d4a..ef3fc6d378e 100644 --- a/src/intel/blorp/blorp_priv.h +++ b/src/intel/blorp/blorp_priv.h @@ -192,7 +192,7 @@ struct blorp_params struct brw_blorp_surface_info dst; enum blorp_hiz_op hiz_op; bool full_surface_hiz_op; - enum blorp_fast_clear_op fast_clear_op; + enum isl_aux_op fast_clear_op; bool color_write_disable[4]; struct brw_blorp_wm_inputs wm_inputs; struct blorp_vs_inputs vs_inputs; diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c index 3939173bb16..7d0ded3423c 100644 --- a/src/intel/vulkan/anv_blorp.c +++ b/src/intel/vulkan/anv_blorp.c @@ -1716,18 +1716,6 @@ anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer, blorp_batch_finish(&batch); } -static enum blorp_fast_clear_op -isl_to_blorp_fast_clear_op(enum isl_aux_op isl_op) -{ - switch (isl_op) { - case ISL_AUX_OP_FAST_CLEAR: return BLORP_FAST_CLEAR_OP_CLEAR; - case ISL_AUX_OP_FULL_RESOLVE: return BLORP_FAST_CLEAR_OP_RESOLVE_FULL; - case ISL_AUX_OP_PARTIAL_RESOLVE: return BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL; - default: - unreachable("Unsupported CCS/MCS aux op"); - } -} - void anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer, const struct anv_image *image, @@ -1796,7 +1784,7 @@ anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer, case ISL_AUX_OP_FULL_RESOLVE: case ISL_AUX_OP_PARTIAL_RESOLVE: blorp_ccs_resolve(&batch, &surf, level, base_layer, layer_count, - surf.surf->format, isl_to_blorp_fast_clear_op(ccs_op)); + surf.surf->format, ccs_op); break; case ISL_AUX_OP_AMBIGUATE: for (uint32_t a = 0; a < layer_count; a++) { diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 30120df9a50..70180630124 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -1449,7 +1449,7 @@ brw_blorp_clear_depth_stencil(struct brw_context *brw, void brw_blorp_resolve_color(struct brw_context *brw, struct intel_mipmap_tree *mt, unsigned level, unsigned layer, - enum blorp_fast_clear_op resolve_op) + enum isl_aux_op resolve_op) { DBG("%s to mt %p level %u layer %u\n", __FUNCTION__, mt, level, layer); diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h index c5ded891bbf..d255fe17184 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.h +++ b/src/mesa/drivers/dri/i965/brw_blorp.h @@ -99,7 +99,7 @@ void brw_blorp_resolve_color(struct brw_context *brw, struct intel_mipmap_tree *mt, unsigned level, unsigned layer, - enum blorp_fast_clear_op resolve_op); + enum isl_aux_op resolve_op); void brw_blorp_mcs_partial_resolve(struct brw_context *brw, diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index f27d559149d..a388fb38b1f 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -2046,7 +2046,7 @@ intel_miptree_check_color_resolve(const struct brw_context *brw, (void)layer; } -static enum blorp_fast_clear_op +static enum isl_aux_op get_ccs_d_resolve_op(enum isl_aux_state aux_state, enum isl_aux_usage aux_usage, bool fast_clear_supported) @@ -2061,12 +2061,12 @@ get_ccs_d_resolve_op(enum isl_aux_state aux_state, case ISL_AUX_STATE_CLEAR: case ISL_AUX_STATE_PARTIAL_CLEAR: if (!ccs_supported) - return BLORP_FAST_CLEAR_OP_RESOLVE_FULL; + return ISL_AUX_OP_FULL_RESOLVE; else - return BLORP_FAST_CLEAR_OP_NONE; + return ISL_AUX_OP_NONE; case ISL_AUX_STATE_PASS_THROUGH: - return BLORP_FAST_CLEAR_OP_NONE; + return ISL_AUX_OP_NONE; case ISL_AUX_STATE_RESOLVED: case ISL_AUX_STATE_AUX_INVALID: @@ -2078,7 +2078,7 @@ get_ccs_d_resolve_op(enum isl_aux_state aux_state, unreachable("Invalid aux state for CCS_D"); } -static enum blorp_fast_clear_op +static enum isl_aux_op get_ccs_e_resolve_op(enum isl_aux_state aux_state, enum isl_aux_usage aux_usage, bool fast_clear_supported) @@ -2095,28 +2095,28 @@ get_ccs_e_resolve_op(enum isl_aux_state aux_state, case ISL_AUX_STATE_CLEAR: case ISL_AUX_STATE_PARTIAL_CLEAR: if (fast_clear_supported) - return BLORP_FAST_CLEAR_OP_NONE; + return ISL_AUX_OP_NONE; else if (aux_usage == ISL_AUX_USAGE_CCS_E) - return BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL; + return ISL_AUX_OP_PARTIAL_RESOLVE; else - return BLORP_FAST_CLEAR_OP_RESOLVE_FULL; + return ISL_AUX_OP_FULL_RESOLVE; case ISL_AUX_STATE_COMPRESSED_CLEAR: if (aux_usage != ISL_AUX_USAGE_CCS_E) - return BLORP_FAST_CLEAR_OP_RESOLVE_FULL; + return ISL_AUX_OP_FULL_RESOLVE; else if (!fast_clear_supported) - return BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL; + return ISL_AUX_OP_PARTIAL_RESOLVE; else - return BLORP_FAST_CLEAR_OP_NONE; + return ISL_AUX_OP_NONE; case ISL_AUX_STATE_COMPRESSED_NO_CLEAR: if (aux_usage != ISL_AUX_USAGE_CCS_E) - return BLORP_FAST_CLEAR_OP_RESOLVE_FULL; + return ISL_AUX_OP_FULL_RESOLVE; else - return BLORP_FAST_CLEAR_OP_NONE; + return ISL_AUX_OP_NONE; case ISL_AUX_STATE_PASS_THROUGH: - return BLORP_FAST_CLEAR_OP_NONE; + return ISL_AUX_OP_NONE; case ISL_AUX_STATE_RESOLVED: case ISL_AUX_STATE_AUX_INVALID: @@ -2135,7 +2135,7 @@ intel_miptree_prepare_ccs_access(struct brw_context *brw, { enum isl_aux_state aux_state = intel_miptree_get_aux_state(mt, level, layer); - enum blorp_fast_clear_op resolve_op; + enum isl_aux_op resolve_op; if (mt->aux_usage == ISL_AUX_USAGE_CCS_E) { resolve_op = get_ccs_e_resolve_op(aux_state, aux_usage, fast_clear_supported); @@ -2145,12 +2145,12 @@ intel_miptree_prepare_ccs_access(struct brw_context *brw, fast_clear_supported); } - if (resolve_op != BLORP_FAST_CLEAR_OP_NONE) { + if (resolve_op != ISL_AUX_OP_NONE) { intel_miptree_check_color_resolve(brw, mt, level, layer); brw_blorp_resolve_color(brw, mt, level, layer, resolve_op); switch (resolve_op) { - case BLORP_FAST_CLEAR_OP_RESOLVE_FULL: + case ISL_AUX_OP_FULL_RESOLVE: /* The CCS full resolve operation destroys the CCS and sets it to the * pass-through state. (You can also think of this as being both a * resolve and an ambiguate in one operation.) @@ -2159,7 +2159,7 @@ intel_miptree_prepare_ccs_access(struct brw_context *brw, ISL_AUX_STATE_PASS_THROUGH); break; - case BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL: + case ISL_AUX_OP_PARTIAL_RESOLVE: intel_miptree_set_aux_state(brw, mt, level, layer, 1, ISL_AUX_STATE_COMPRESSED_NO_CLEAR); break;