From: Luke Kenneth Casson Leighton Date: Mon, 29 Oct 2018 05:57:22 +0000 (+0000) Subject: add extra ld elwidth tests, add #defines for elwidths X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1eb7561fda61006eb075e79b69d4579d1ad4989c;p=riscv-tests.git add extra ld elwidth tests, add #defines for elwidths --- diff --git a/isa/macros/simplev/sv_test_macros.h b/isa/macros/simplev/sv_test_macros.h index dccb784..0395755 100644 --- a/isa/macros/simplev/sv_test_macros.h +++ b/isa/macros/simplev/sv_test_macros.h @@ -53,3 +53,8 @@ ld x1, offs(x1); \ fmv.x.d x2, freg; \ bne x2, x1, fail + +#define SV_W_DFLT 0 +#define SV_W_8BIT 1 +#define SV_W_16BIT 2 +#define SV_W_32BIT 3 diff --git a/isa/rv64ui/sv_ld_elwidth.S b/isa/rv64ui/sv_ld_elwidth.S index dceb13f..2aea71f 100644 --- a/isa/rv64ui/sv_ld_elwidth.S +++ b/isa/rv64ui/sv_ld_elwidth.S @@ -41,14 +41,20 @@ RVTEST_RV64U # Define TVM used by program. # Test code region. RVTEST_CODE_BEGIN # Start of test code. - SV_ELWIDTH_TEST( ld , 2, 8, 0, 0, testdata1, + SV_ELWIDTH_TEST( ld , 2, 8, SV_W_DFLT, SV_W_DFLT, testdata1, 0x8979695949392919, 0x8777675747372717, 0xa5a5a5a5a5a5a5a5 ) - SV_ELWIDTH_TEST( ld , 3, 8, 0, 0, testdata1, + SV_ELWIDTH_TEST( ld , 3, 8, SV_W_DFLT, SV_W_DFLT, testdata1, 0x8979695949392919, 0x8777675747372717, 0x8676665646362616 ) - SV_ELWIDTH_TEST( ld , 3, 8, 2, 0, testdata1, + SV_ELWIDTH_TEST( ld , 3, 8, SV_W_16BIT, SV_W_DFLT, testdata1, 0x0000000000002919, 0x0000000000004939, 0x0000000000006959 ) - SV_ELWIDTH_TEST( ld , 5, 8, 2, 3, testdata1, + SV_ELWIDTH_TEST( ld , 5, 8, SV_W_16BIT, SV_W_32BIT, testdata1, 0x0000493900002919, 0xffff897900006959, 0xa5a5a5a500002717 ) + SV_ELWIDTH_TEST( ld , 5, 8, SV_W_32BIT, SV_W_16BIT, testdata1, + 0x6757271769592919, 0xa5a5a5a5a5a52616, 0xa5a5a5a5a5a5a5a5 ) + SV_ELWIDTH_TEST( ld , 7, 8, SV_W_16BIT, SV_W_8BIT, testdata1, + 0xa557371779593919, 0xa5a5a5a5a5a5a5a5, 0xa5a5a5a5a5a5a5a5 ) + SV_ELWIDTH_TEST( ld , 11, 8, SV_W_8BIT, SV_W_16BIT, testdata1, + 0x0049003900290019, 0xff89007900690059, 0xa5a5003700270017 ) RVTEST_PASS # Signal success. fail: