From: Eddie Hung Date: Sun, 16 Jun 2019 19:08:03 +0000 (-0700) Subject: Try -W 300 X-Git-Tag: working-ls180~1208^2~152 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1ec450d6bf34a7aec9b0469b6f295847eb658160;p=yosys.git Try -W 300 --- diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index 63ede275f..7b20a7132 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -25,7 +25,8 @@ USING_YOSYS_NAMESPACE PRIVATE_NAMESPACE_BEGIN -#define XC7_WIRE_DELAY "160" +#define XC7_WIRE_DELAY "300" // Number with which ABC will map a 6-input gate + // to one LUT6 (instead of a LUT5 + LUT2) struct SynthXilinxPass : public ScriptPass {