From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Thu, 19 Oct 2023 10:18:34 +0000 (+0100)
Subject: added lhzsux instruction
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1ec458f4b554703d0660776a02dff9929c6bfd6e;p=openpower-isa.git

added lhzsux instruction
---

diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn
index 45827e77..b401e12c 100644
--- a/openpower/isa/fixedloadshift.mdwn
+++ b/openpower/isa/fixedloadshift.mdwn
@@ -67,22 +67,22 @@ X-Form
 Pseudo-code:
 
     b <- (RA|0)
-    EA <- b + (RB) (sm+1)
+    EA <- b + (RB) << (sm+1)
     RT <- ([0] * (XLEN-16)) || MEM(EA, 2)
 
 Special Registers Altered:
 
     None
 
-# Load Halfword and Zero with Update Indexed
+# Load Halfword and Zero Shifted with Update Indexed
 
 X-Form
 
-* lhzux RT,RA,RB
+* lhzsux RT,RA,RB,sm
 
 Pseudo-code:
 
-    EA <- (RA) + (RB)
+    EA <- (RA) + (RB) << (sm+1)
     RT <- ([0] * (XLEN-16)) || MEM(EA, 2)
     RA <- EA