From: Sebastien Bourdeauducq <sebastien@milkymist.org>
Date: Fri, 22 Jun 2012 13:01:47 +0000 (+0200)
Subject: control.For -> misc.IntSequence
X-Git-Tag: 24jan2021_ls180~2099^2~893
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1edaec0d758c5e6853ce4685f711779fa43d5745;p=litex.git

control.For -> misc.IntSequence
---

diff --git a/examples/dataflow/control.py b/examples/dataflow/control.py
deleted file mode 100644
index 8819250e..00000000
--- a/examples/dataflow/control.py
+++ /dev/null
@@ -1,31 +0,0 @@
-from migen.flow.network import *
-from migen.actorlib import control
-from migen.actorlib.sim import *
-from migen.sim.generic import Simulator
-from migen.sim.icarus import Runner
-
-def source_gen():
-	for i in range(10):
-		v = i + 5
-		print("==> " + str(v))
-		yield Token("source", {"value": v})
-
-def sink_gen():
-	while True:
-		t = Token("sink")
-		yield t
-		print(t.value["value"])
-
-def main():
-	source = ActorNode(SimActor(source_gen(), ("source", Source, [("value", BV(32))])))
-	loop = ActorNode(control.For(32))
-	sink = ActorNode(SimActor(sink_gen(), ("sink", Sink, [("value", BV(32))])))
-	g = DataFlowGraph()
-	g.add_connection(source, loop)
-	g.add_connection(loop, sink)
-	comp = CompositeActor(g)
-	fragment = comp.get_fragment()
-	sim = Simulator(fragment, Runner())
-	sim.run(500)
-
-main()
diff --git a/examples/dataflow/misc.py b/examples/dataflow/misc.py
new file mode 100644
index 00000000..0aa0854b
--- /dev/null
+++ b/examples/dataflow/misc.py
@@ -0,0 +1,31 @@
+from migen.flow.network import *
+from migen.actorlib import misc
+from migen.actorlib.sim import *
+from migen.sim.generic import Simulator
+from migen.sim.icarus import Runner
+
+def source_gen():
+	for i in range(10):
+		v = i + 5
+		print("==> " + str(v))
+		yield Token("source", {"value": v})
+
+def sink_gen():
+	while True:
+		t = Token("sink")
+		yield t
+		print(t.value["value"])
+
+def main():
+	source = ActorNode(SimActor(source_gen(), ("source", Source, [("value", BV(32))])))
+	loop = ActorNode(misc.IntSequence(32))
+	sink = ActorNode(SimActor(sink_gen(), ("sink", Sink, [("value", BV(32))])))
+	g = DataFlowGraph()
+	g.add_connection(source, loop)
+	g.add_connection(loop, sink)
+	comp = CompositeActor(g)
+	fragment = comp.get_fragment()
+	sim = Simulator(fragment, Runner())
+	sim.run(500)
+
+main()
diff --git a/migen/actorlib/control.py b/migen/actorlib/control.py
deleted file mode 100644
index 0d562cc0..00000000
--- a/migen/actorlib/control.py
+++ /dev/null
@@ -1,57 +0,0 @@
-from migen.fhdl.structure import *
-from migen.corelogic.record import *
-from migen.corelogic.fsm import *
-from migen.flow.actor import *
-
-# Generates integers from start to maximum-1
-class For(Actor):
-	def __init__(self, nbits, step=1):
-		self.nbits = nbits
-		self.step = step
-		
-		super().__init__(
-			("maximum", Sink, [("value", BV(nbits))]),
-			("source", Source, [("value", BV(nbits))]))
-	
-	def get_fragment(self):
-		load = Signal()
-		ce = Signal()
-		last = Signal()
-		
-		maximum = Signal(BV(self.nbits))
-		counter = Signal(BV(self.nbits))
-		
-		if self.step > 1:
-			comb = [last.eq(counter + self.step >= maximum)]
-		else:
-			comb = [last.eq(counter + 1 == maximum)]
-		sync = [
-			If(load,
-				counter.eq(0),
-				maximum.eq(self.token("maximum").value)
-			).Elif(ce,
-				If(last,
-					counter.eq(0)
-				).Else(
-					counter.eq(counter + self.step)
-				)
-			)
-		]
-		comb.append(self.token("source").value.eq(counter))
-		counter_fragment = Fragment(comb, sync)
-		
-		fsm = FSM("IDLE", "ACTIVE")
-		fsm.act(fsm.IDLE,
-			load.eq(1),
-			self.endpoints["maximum"].ack.eq(1),
-			If(self.endpoints["maximum"].stb, fsm.next_state(fsm.ACTIVE))
-		)
-		fsm.act(fsm.ACTIVE,
-			self.busy.eq(1),
-			self.endpoints["source"].stb.eq(1),
-			If(self.endpoints["source"].ack,
-				ce.eq(1),
-				If(last, fsm.next_state(fsm.IDLE))
-			)
-		)
-		return counter_fragment + fsm.get_fragment()
diff --git a/migen/actorlib/misc.py b/migen/actorlib/misc.py
new file mode 100644
index 00000000..60b18ac1
--- /dev/null
+++ b/migen/actorlib/misc.py
@@ -0,0 +1,57 @@
+from migen.fhdl.structure import *
+from migen.corelogic.record import *
+from migen.corelogic.fsm import *
+from migen.flow.actor import *
+
+# Generates integers from start to maximum-1
+class IntSequence(Actor):
+	def __init__(self, nbits, step=1):
+		self.nbits = nbits
+		self.step = step
+		
+		super().__init__(
+			("maximum", Sink, [("value", BV(nbits))]),
+			("source", Source, [("value", BV(nbits))]))
+	
+	def get_fragment(self):
+		load = Signal()
+		ce = Signal()
+		last = Signal()
+		
+		maximum = Signal(BV(self.nbits))
+		counter = Signal(BV(self.nbits))
+		
+		if self.step > 1:
+			comb = [last.eq(counter + self.step >= maximum)]
+		else:
+			comb = [last.eq(counter + 1 == maximum)]
+		sync = [
+			If(load,
+				counter.eq(0),
+				maximum.eq(self.token("maximum").value)
+			).Elif(ce,
+				If(last,
+					counter.eq(0)
+				).Else(
+					counter.eq(counter + self.step)
+				)
+			)
+		]
+		comb.append(self.token("source").value.eq(counter))
+		counter_fragment = Fragment(comb, sync)
+		
+		fsm = FSM("IDLE", "ACTIVE")
+		fsm.act(fsm.IDLE,
+			load.eq(1),
+			self.endpoints["maximum"].ack.eq(1),
+			If(self.endpoints["maximum"].stb, fsm.next_state(fsm.ACTIVE))
+		)
+		fsm.act(fsm.ACTIVE,
+			self.busy.eq(1),
+			self.endpoints["source"].stb.eq(1),
+			If(self.endpoints["source"].ack,
+				ce.eq(1),
+				If(last, fsm.next_state(fsm.IDLE))
+			)
+		)
+		return counter_fragment + fsm.get_fragment()