From: lkcl <lkcl@web>
Date: Thu, 4 May 2023 10:29:00 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1efd078d27d49637756cfda732d2e9e8751dacc3;p=libreriscv.git

---

diff --git a/openpower/sv/rfc/ls012.mdwn b/openpower/sv/rfc/ls012.mdwn
index 203be7617..6b1ca3fde 100644
--- a/openpower/sv/rfc/ls012.mdwn
+++ b/openpower/sv/rfc/ls012.mdwn
@@ -216,6 +216,8 @@ operations, typically performing for example one multiply but in-place
 subtracting that product from one operand and adding it to the other.
 The *in-place* aspect is strategically extremely important for significant
 reductions in Vectorised register usage, particularly for DCT.
+Further: even without Simple-V the number of instructions saved is huge: 8 for
+integer and 4 for floating-point vs one.
 
 ## CR Weird group