From: lkcl <lkcl@web>
Date: Thu, 8 Sep 2022 16:12:33 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~609
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1f92b6b596f42cd6c601db00aca04877eb3b4d2e;p=libreriscv.git

---

diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn
index 04d4b4671..5b34179a1 100644
--- a/openpower/sv/rfc/ls001.mdwn
+++ b/openpower/sv/rfc/ls001.mdwn
@@ -21,7 +21,7 @@ Links
 This proposal is to extend the Power ISA with an Abstract RISC-Paradigm
 Vectorisation Concept that may be applied to **all and any** suitable
 Scalar instructions, present and future, in the Scalar Power ISA.
-**It is not a Vector ISA and does not add Vector opcodes of any kind**.
+**It is not a Traditional Vector ISA and therefore does not add Vector opcodes of any kind**.
 A variant of Simple-V was originally invented in 1994 by Peter Hsu
 (Architect of the MIPS R8000) but was dropped as MIPS did not have an
 Out-of-Order Microarchitecture.