From: Florent Kermarrec Date: Sun, 26 Apr 2020 19:05:47 +0000 (+0200) Subject: serv/cores: fix verilog top level (use serv_rf_top instead of serv_top), working :). X-Git-Tag: 24jan2021_ls180~431^2~3 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1f9db583fd47c82d42e51058774d3654fae16883;p=litex.git serv/cores: fix verilog top level (use serv_rf_top instead of serv_top), working :). --- diff --git a/litex/soc/cores/cpu/serv/core.py b/litex/soc/cores/cpu/serv/core.py index ab73cea2..e24853c4 100644 --- a/litex/soc/cores/cpu/serv/core.py +++ b/litex/soc/cores/cpu/serv/core.py @@ -88,4 +88,4 @@ class SERV(CPU): def do_finalize(self): assert hasattr(self, "reset_address") - self.specials += Instance("serv_top", **self.cpu_params) + self.specials += Instance("serv_rf_top", **self.cpu_params)