From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 15 Jun 2021 10:09:03 +0000 (+0100)
Subject: whoops overlap of fv0-2 with sum/2/tmp, move further up
X-Git-Tag: xlen-bcd~460
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1fbc4fc239563b9bedb47282ba20df1881d6ec48;p=openpower-isa.git

whoops overlap of fv0-2 with sum/2/tmp, move further up
---

diff --git a/media/audio/mp3/mp3_0_apply_window_float_basicsv.s b/media/audio/mp3/mp3_0_apply_window_float_basicsv.s
index 0a0c5d0f..9ae5f721 100644
--- a/media/audio/mp3/mp3_0_apply_window_float_basicsv.s
+++ b/media/audio/mp3/mp3_0_apply_window_float_basicsv.s
@@ -20,9 +20,9 @@
 #.set fv1, 40
 #.set fv2, 48
 # for now... TODO, add 128 regs to simulator
-.set fv0, 0
-.set fv1, 8
-.set fv2, 16
+.set fv0, 8
+.set fv1, 16
+.set fv2, 24
 
 # floats
 .set sum, 0