From: Gene Wu <Gene.Wu@arm.com>
Date: Mon, 23 Aug 2010 16:18:41 +0000 (-0500)
Subject: ARM: Don't write tracedata on writes, it might have been freed already.
X-Git-Tag: stable_2012_02_02~885
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1fd104fc35ed5a1fa01e5709aba0dec58a5db6f5;p=gem5.git

ARM: Don't write tracedata on writes, it might have been freed already.
---

diff --git a/src/arch/arm/isa/templates/mem.isa b/src/arch/arm/isa/templates/mem.isa
index 5431777b2..84cd1dd8f 100644
--- a/src/arch/arm/isa/templates/mem.isa
+++ b/src/arch/arm/isa/templates/mem.isa
@@ -200,7 +200,6 @@ def template StoreExecute {{
             if (fault == NoFault) {
                 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
                                   memAccessFlags, NULL);
-                if (traceData) { traceData->setData(Mem); }
             }
 
             if (fault == NoFault) {
@@ -240,7 +239,6 @@ def template StoreExExecute {{
             if (fault == NoFault) {
                 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
                                   memAccessFlags, &writeResult);
-                if (traceData) { traceData->setData(Mem); }
             }
 
             if (fault == NoFault) {
@@ -282,7 +280,6 @@ def template StoreExInitiateAcc {{
             if (fault == NoFault) {
                 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
                                   memAccessFlags, NULL);
-                if (traceData) { traceData->setData(Mem); }
             }
 
             // Need to write back any potential address register update
@@ -321,7 +318,6 @@ def template StoreInitiateAcc {{
             if (fault == NoFault) {
                 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
                                   memAccessFlags, NULL);
-                if (traceData) { traceData->setData(Mem); }
             }
 
             // Need to write back any potential address register update