From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Thu, 7 May 2015 18:03:55 +0000 (+0200)
Subject: liteusb/frontend/dma: remove +4 to length for CRC (we'll do it in core)
X-Git-Tag: 24jan2021_ls180~2254
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1fd189512f00f6485b900bff9b68394b647dfa50;p=litex.git

liteusb/frontend/dma: remove +4 to length for CRC (we'll do it in core)
---

diff --git a/misoclib/com/liteusb/frontend/dma.py b/misoclib/com/liteusb/frontend/dma.py
index 79f7ab67..d656eca3 100644
--- a/misoclib/com/liteusb/frontend/dma.py
+++ b/misoclib/com/liteusb/frontend/dma.py
@@ -78,7 +78,7 @@ class LiteUSBDMAReader(Module, AutoCSR):
             source.stb.eq(unpack.source.stb),
             source.sop.eq(cnt == 0),
             source.eop.eq(cnt == (self.dma.length*pack_factor-1)),
-            source.length.eq(self.dma.length*pack_factor+4),
+            source.length.eq(self.dma.length*pack_factor),
             source.data.eq(unpack.source.data),
             source.dst.eq(tag),
             unpack.source.ack.eq(source.ack)