From: lkcl Date: Sat, 8 Feb 2020 16:15:30 +0000 (+0000) Subject: (no commit message) X-Git-Tag: convert-csv-opcode-to-binary~3516 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1ffb9ad5b1d2891e1f8c22ee21c04903c71cda7e;p=libreriscv.git --- diff --git a/The_Mission.mdwn b/The_Mission.mdwn index 08853c861..cb85b412d 100644 --- a/The_Mission.mdwn +++ b/The_Mission.mdwn @@ -19,4 +19,5 @@ ## The Machine: -a (quad core, 800mhz, dual issue, 4-wide FP32, CPU, GPU, VPU, [and later an ML inference core] ) SOC. +- our first target (Oct 2020): a single-core dual-issue 180nm 64-bit "demo" QFP chip that will also be a saleable product in the "Embedded" space (Arduino, STM32F, Ingenic jz4720). +- a full quad core SoC: 800mhz, dual issue, 4-wide FP32, Hybrid CPU / GPU / VPU [and later an ML inference core], comparable to the Allwinner 64 in capability.