From: Nick Clifton Date: Wed, 4 Feb 2015 13:42:26 +0000 (+0000) Subject: re PR target/64408 (fr30-elf ICE in extract_insn, at recog.c:2202) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=20693e972aeede9d6d337982074f20593a6495bb;p=gcc.git re PR target/64408 (fr30-elf ICE in extract_insn, at recog.c:2202) PR target/64408 * config/fr30/predicates.md (di_operand): Add SUBREG to the list of accepted codes. (nonimmediate_di_operand): Likewise. From-SVN: r220400 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e01618e1437..2afc315c46d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -11,6 +11,11 @@ 2015-02-04 Nick Clifton + PR target/64408 + * config/fr30/predicates.md (di_operand): Add SUBREG to the list + of accepted codes. + (nonimmediate_di_operand): Likewise. + * config/msp430/msp430.c (msp430_use_f5_series_hwmult): Add more prefixes of known F5 using MSP430 MCUs. diff --git a/gcc/config/fr30/predicates.md b/gcc/config/fr30/predicates.md index aa4cd58f261..461b7eb5917 100644 --- a/gcc/config/fr30/predicates.md +++ b/gcc/config/fr30/predicates.md @@ -64,7 +64,7 @@ ;; Returns TRUE if OP is a valid operand of a DImode operation. (define_predicate "di_operand" - (match_code "const_int,const_double,reg,mem") + (match_code "const_int,const_double,reg,subreg,mem") { if (register_operand (op, mode)) return TRUE; @@ -92,7 +92,7 @@ ;; Returns TRUE if OP is a DImode register or MEM. (define_predicate "nonimmediate_di_operand" - (match_code "reg,mem") + (match_code "reg,subreg,mem") { if (register_operand (op, mode)) return TRUE;