From: Jakub Jelinek <jakub@redhat.com>
Date: Thu, 26 May 2016 08:45:49 +0000 (+0200)
Subject: sse.md (*vcvtps2ph_store<mask_name>): Use v constraint instead of x constraint.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2116e19f83541bdddcf77ecbc13c08f2fcae1686;p=gcc.git

sse.md (*vcvtps2ph_store<mask_name>): Use v constraint instead of x constraint.

	* config/i386/sse.md (*vcvtps2ph_store<mask_name>): Use v constraint
	instead of x constraint.
	(vcvtps2ph256<mask_name>): Likewise.

	* gcc.target/i386/avx512vl-vcvtps2ph-3.c: New test.

From-SVN: r236765
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7b7c6a9a956..b1cd89ec209 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,9 @@
 2016-05-26  Jakub Jelinek  <jakub@redhat.com>
 
+	* config/i386/sse.md (*vcvtps2ph_store<mask_name>): Use v constraint
+	instead of x constraint.
+	(vcvtps2ph256<mask_name>): Likewise.
+
 	* config/i386/sse.md (*ssse3_palignr<mode>_perm): Add avx512bw
 	alternative.  Formatting fix.
 
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 93b65712aee..0d3dab62447 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -18335,7 +18335,7 @@
 
 (define_insn "*vcvtps2ph_store<mask_name>"
   [(set (match_operand:V4HI 0 "memory_operand" "=m")
-	(unspec:V4HI [(match_operand:V4SF 1 "register_operand" "x")
+	(unspec:V4HI [(match_operand:V4SF 1 "register_operand" "v")
 		      (match_operand:SI 2 "const_0_to_255_operand" "N")]
 		     UNSPEC_VCVTPS2PH))]
   "TARGET_F16C || TARGET_AVX512VL"
@@ -18345,8 +18345,8 @@
    (set_attr "mode" "V4SF")])
 
 (define_insn "vcvtps2ph256<mask_name>"
-  [(set (match_operand:V8HI 0 "nonimmediate_operand" "=xm")
-	(unspec:V8HI [(match_operand:V8SF 1 "register_operand" "x")
+  [(set (match_operand:V8HI 0 "nonimmediate_operand" "=vm")
+	(unspec:V8HI [(match_operand:V8SF 1 "register_operand" "v")
 		      (match_operand:SI 2 "const_0_to_255_operand" "N")]
 		     UNSPEC_VCVTPS2PH))]
   "TARGET_F16C || TARGET_AVX512VL"
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index f89f81b66b2..4fc3a5fee74 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,7 @@
 2016-05-26  Jakub Jelinek  <jakub@redhat.com>
 
+	* gcc.target/i386/avx512vl-vcvtps2ph-3.c: New test.
+
 	* gcc.target/i386/avx512bw-vpalignr-4.c: New test.
 	* gcc.target/i386/avx512vl-vpalignr-4.c: New test.
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-3.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-3.c
new file mode 100644
index 00000000000..2fd2215599d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-3.c
@@ -0,0 +1,41 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mf16c -mavx512vl -masm=att" } */
+
+#include <x86intrin.h>
+
+void
+f1 (__m128 x)
+{
+  register __m128 a __asm ("xmm16");
+  register __m128i b __asm ("xmm17");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  b = _mm_cvtps_ph (a, 1);
+  asm volatile ("" : "+v" (b));
+}
+
+/* { dg-final { scan-assembler "vcvtps2ph\[^\n\r]*\\\$1\[^\n\r]*%xmm16\[^\n\r]*%xmm17" } } */
+
+void
+f2 (__m256 x)
+{
+  register __m256 a __asm ("xmm16");
+  register __m128i b __asm ("xmm17");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  b = _mm256_cvtps_ph (a, 1);
+  asm volatile ("" : "+v" (b));
+}
+
+/* { dg-final { scan-assembler "vcvtps2ph\[^\n\r]*\\\$1\[^\n\r]*%ymm16\[^\n\r]*%xmm17" } } */
+
+void
+f3 (__m256 x, __v8hi *y)
+{
+  register __m256 a __asm ("xmm16");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  *y = (__v8hi) _mm256_cvtps_ph (a, 1);
+}
+
+/* { dg-final { scan-assembler "vcvtps2ph\[^\n\r]*\\\$1\[^\n\r]*%ymm16\[^\n\r]*%rdi" } } */