From: John David Anglin Date: Wed, 10 May 2017 22:54:07 +0000 (+0000) Subject: re PR target/79027 (fold-const.c:11104:1: internal compiler error: Floating point... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=212b7e9cf3ea60a38943239707d82ab369e83c71;p=gcc.git re PR target/79027 (fold-const.c:11104:1: internal compiler error: Floating point exception) PR target/79027 * config/pa/pa.c (pa_cannot_change_mode_class): Reject changes to/from modes with zero size. Enhance comment. From-SVN: r247869 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 075b50d1fc5..4483f33ed1f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-05-10 John David Anglin + + PR target/79027 + * config/pa/pa.c (pa_cannot_change_mode_class): Reject changes to/from + modes with zero size. Enhance comment. + 2017-05-10 Bill Schmidt * config/rs6000/rs6000.c (altivec_init_builtins): Define POWER8 diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index 3f7b2c71a2f..874d12d3741 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -9962,19 +9962,23 @@ pa_cannot_change_mode_class (machine_mode from, machine_mode to, if (from == to) return false; + if (GET_MODE_SIZE (from) == GET_MODE_SIZE (to)) + return false; + + /* Reject changes to/from modes with zero size. */ + if (!GET_MODE_SIZE (from) || !GET_MODE_SIZE (to)) + return true; + /* Reject changes to/from complex and vector modes. */ if (COMPLEX_MODE_P (from) || VECTOR_MODE_P (from) || COMPLEX_MODE_P (to) || VECTOR_MODE_P (to)) return true; - if (GET_MODE_SIZE (from) == GET_MODE_SIZE (to)) - return false; - - /* There is no way to load QImode or HImode values directly from - memory. SImode loads to the FP registers are not zero extended. - On the 64-bit target, this conflicts with the definition of - LOAD_EXTEND_OP. Thus, we can't allow changing between modes - with different sizes in the floating-point registers. */ + /* There is no way to load QImode or HImode values directly from memory + to a FP register. SImode loads to the FP registers are not zero + extended. On the 64-bit target, this conflicts with the definition + of LOAD_EXTEND_OP. Thus, we can't allow changing between modes with + different sizes in the floating-point registers. */ if (MAYBE_FP_REG_CLASS_P (rclass)) return true;