From: Glenn Kennard Date: Wed, 23 Jul 2014 09:10:06 +0000 (+0200) Subject: r600g: Add IMUL_HI/UMUL_HI support X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2133a1aedf23c8d88a35b9ca2f30719a68705504;p=mesa.git r600g: Add IMUL_HI/UMUL_HI support Fixes fs-imulExtended, fs-imulExtended-only-msb, fs-umulExtended, fs-umulExtended-only-msb piglit tests. Reviewed-by: Alex Deucher --- diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index 0d9cb26784e..7b79646ba89 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -6671,8 +6671,8 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = { {TGSI_OPCODE_TEX2, 0, FETCH_OP_SAMPLE, tgsi_tex}, {TGSI_OPCODE_TXB2, 0, FETCH_OP_SAMPLE_LB, tgsi_tex}, {TGSI_OPCODE_TXL2, 0, FETCH_OP_SAMPLE_L, tgsi_tex}, - {TGSI_OPCODE_IMUL_HI, 0, ALU_OP0_NOP, tgsi_unsupported}, - {TGSI_OPCODE_UMUL_HI, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_IMUL_HI, 0, ALU_OP2_MULHI_INT, tgsi_op2_trans}, + {TGSI_OPCODE_UMUL_HI, 0, ALU_OP2_MULHI_UINT, tgsi_op2_trans}, {TGSI_OPCODE_TG4, 0, FETCH_OP_GATHER4, tgsi_unsupported}, {TGSI_OPCODE_LODQ, 0, FETCH_OP_GET_LOD, tgsi_unsupported}, {TGSI_OPCODE_LAST, 0, ALU_OP0_NOP, tgsi_unsupported}, @@ -6866,8 +6866,8 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = { {TGSI_OPCODE_TEX2, 0, FETCH_OP_SAMPLE, tgsi_tex}, {TGSI_OPCODE_TXB2, 0, FETCH_OP_SAMPLE_LB, tgsi_tex}, {TGSI_OPCODE_TXL2, 0, FETCH_OP_SAMPLE_L, tgsi_tex}, - {TGSI_OPCODE_IMUL_HI, 0, ALU_OP0_NOP, tgsi_unsupported}, - {TGSI_OPCODE_UMUL_HI, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_IMUL_HI, 0, ALU_OP2_MULHI_INT, tgsi_op2_trans}, + {TGSI_OPCODE_UMUL_HI, 0, ALU_OP2_MULHI_UINT, tgsi_op2_trans}, {TGSI_OPCODE_TG4, 0, FETCH_OP_GATHER4, tgsi_tex}, {TGSI_OPCODE_LODQ, 0, FETCH_OP_GET_LOD, tgsi_tex}, {TGSI_OPCODE_LAST, 0, ALU_OP0_NOP, tgsi_unsupported}, @@ -7062,8 +7062,8 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = { {TGSI_OPCODE_TEX2, 0, FETCH_OP_SAMPLE, tgsi_tex}, {TGSI_OPCODE_TXB2, 0, FETCH_OP_SAMPLE_LB, tgsi_tex}, {TGSI_OPCODE_TXL2, 0, FETCH_OP_SAMPLE_L, tgsi_tex}, - {TGSI_OPCODE_IMUL_HI, 0, ALU_OP0_NOP, tgsi_unsupported}, - {TGSI_OPCODE_UMUL_HI, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_IMUL_HI, 0, ALU_OP2_MULHI_INT, cayman_mul_int_instr}, + {TGSI_OPCODE_UMUL_HI, 0, ALU_OP2_MULHI_UINT, cayman_mul_int_instr}, {TGSI_OPCODE_TG4, 0, FETCH_OP_GATHER4, tgsi_tex}, {TGSI_OPCODE_LODQ, 0, FETCH_OP_GET_LOD, tgsi_tex}, {TGSI_OPCODE_LAST, 0, ALU_OP0_NOP, tgsi_unsupported},