From: lkcl <lkcl@web>
Date: Mon, 30 May 2022 06:31:45 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2040
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=215fe37015bbdcf5d26db8c68a3e8f1a82f00b64;p=libreriscv.git

---

diff --git a/openpower/sv.mdwn b/openpower/sv.mdwn
index 23eca5283..399073e5a 100644
--- a/openpower/sv.mdwn
+++ b/openpower/sv.mdwn
@@ -63,8 +63,7 @@ same level as add, popcnt and fld**
   those are currently EXT022 and EXT05.
 * brownfield encoding in one of those two major opcodes still
   requires multiple VA-Form operations (in greater numbers
-  than EXT04 has spare) currently in EXT022 (which is under
-  severe design pressure)
+  than EXT04 has spare)
 * space in EXT019 next to addpcis and crops is recommended
 * many X-Form opcodes currently in EXT022 have no preference
   for a location at all, and may be moved to EXT059, EXT019,
@@ -77,6 +76,11 @@ would become a whopping 96-bit long instruction. Avoiding this
 situation is a high priority which in turn by necessity puts pressure
 on the 32-bit Major Opcode space.
 
+Note also that EXT022, the Official Architectural Sandbox area
+is under severe design pressure as it is insufficient to hold
+the full extent of the instruction additions required to create
+a Hybrid 3D CPU-VPU-GPU.
+
 # Sub-pages
 
 Pages being developed and examples