From: Kenneth Graunke <kenneth@whitecape.org>
Date: Thu, 29 Nov 2012 05:16:18 +0000 (-0800)
Subject: i965: Duplicate gen7_atoms to gen8_atoms.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2184b519cd2cbb7163d4757afb8d8dc193864c4d;p=mesa.git

i965: Duplicate gen7_atoms to gen8_atoms.

It's going to diverge significantly.  Starting out with a copy allows
future patches to change atoms one by one.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
---

diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index ca256c2e73c..65fea722945 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -251,6 +251,81 @@ static const struct brw_tracked_state *gen7_atoms[] =
    &haswell_cut_index,
 };
 
+static const struct brw_tracked_state *gen8_atoms[] =
+{
+   &brw_vs_prog,
+   &brw_gs_prog,
+   &brw_wm_prog,
+
+   /* Command packets: */
+   &brw_state_base_address,
+
+   &brw_cc_vp,
+   &gen7_cc_viewport_state_pointer, /* must do after brw_cc_vp */
+   &gen7_sf_clip_viewport,
+
+   &gen7_push_constant_space,
+   &gen7_urb,
+   &gen6_blend_state,
+   &gen6_color_calc_state,
+   &gen6_depth_stencil_state,
+
+   &gen6_vs_push_constants, /* Before vs_state */
+   &gen7_gs_push_constants, /* Before gs_state */
+   &gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
+
+   /* Surface state setup.  Must come before the VS/WM unit.  The binding
+    * table upload must be last.
+    */
+   &brw_vs_pull_constants,
+   &brw_vs_ubo_surfaces,
+   &brw_vs_abo_surfaces,
+   &brw_gs_pull_constants,
+   &brw_gs_ubo_surfaces,
+   &brw_gs_abo_surfaces,
+   &brw_wm_pull_constants,
+   &brw_wm_ubo_surfaces,
+   &brw_wm_abo_surfaces,
+   &gen6_renderbuffer_surfaces,
+   &brw_texture_surfaces,
+   &brw_vs_binding_table,
+   &brw_gs_binding_table,
+   &brw_wm_binding_table,
+
+   &brw_fs_samplers,
+   &brw_vs_samplers,
+   &brw_gs_samplers,
+   &gen6_multisample_state,
+
+   &gen7_disable_stages,
+   &gen7_vs_state,
+   &gen7_gs_state,
+   &gen7_sol_state,
+   &gen7_clip_state,
+   &gen7_sbe_state,
+   &gen7_sf_state,
+   &gen7_wm_state,
+   &gen7_ps_state,
+
+   &gen6_scissor_state,
+
+   &gen7_depthbuffer,
+
+   &brw_polygon_stipple,
+   &brw_polygon_stipple_offset,
+
+   &brw_line_stipple,
+   &brw_aa_line_parameters,
+
+   &brw_drawing_rect,
+
+   &brw_indices,
+   &brw_index_buffer,
+   &brw_vertices,
+
+   &haswell_cut_index,
+};
+
 static void
 brw_upload_initial_gpu_state(struct brw_context *brw)
 {
@@ -272,7 +347,10 @@ void brw_init_state( struct brw_context *brw )
 
    brw_init_caches(brw);
 
-   if (brw->gen >= 7) {
+   if (brw->gen >= 8) {
+      atoms = gen8_atoms;
+      num_atoms = ARRAY_SIZE(gen8_atoms);
+   } else if (brw->gen == 7) {
       atoms = gen7_atoms;
       num_atoms = ARRAY_SIZE(gen7_atoms);
    } else if (brw->gen == 6) {