From: Michael Nolan <mtnolan2640@gmail.com>
Date: Wed, 20 May 2020 13:28:40 +0000 (-0400)
Subject: Fix broken test_caller.py
X-Git-Tag: div_pipeline~1047
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=218766fa50f7d4c945477c614b91db6d6d4edfcf;p=soc.git

Fix broken test_caller.py
---

diff --git a/src/soc/decoder/isa/test_caller.py b/src/soc/decoder/isa/test_caller.py
index a8ddc3fe..20313453 100644
--- a/src/soc/decoder/isa/test_caller.py
+++ b/src/soc/decoder/isa/test_caller.py
@@ -27,7 +27,7 @@ class DecoderTestCase(FHDLTestCase):
         pdecode = create_pdecode()
 
         m.submodules.pdecode2 = pdecode2 = PowerDecode2(pdecode)
-        simulator = ISA(pdecode2, initial_regs, initial_sprs)
+        simulator = ISA(pdecode2, initial_regs, initial_sprs, 0)
         comb += pdecode2.dec.raw_opcode_in.eq(instruction)
         sim = Simulator(m)
         gen = generator.generate_instructions()