From: Marek Olšák Date: Tue, 10 Feb 2015 13:16:56 +0000 (+0100) Subject: radeonsi: initialize TC_L2_dirty to false after buffer allocation X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=218b15715ec6a9e987ae78d904683801e5ccdf4b;p=mesa.git radeonsi: initialize TC_L2_dirty to false after buffer allocation I forgot to do this, though "true" should have no effect on correctness. Reviewed-by: Michel Dänzer --- diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c index b7306d7bf34..ebe80671536 100644 --- a/src/gallium/drivers/radeon/r600_buffer_common.c +++ b/src/gallium/drivers/radeon/r600_buffer_common.c @@ -185,6 +185,7 @@ bool r600_init_resource(struct r600_common_screen *rscreen, pb_reference(&old_buf, NULL); util_range_set_empty(&res->valid_buffer_range); + res->TC_L2_dirty = false; if (rscreen->debug_flags & DBG_VM && res->b.b.target == PIPE_BUFFER) { fprintf(stderr, "VM start=0x%"PRIX64" end=0x%"PRIX64" | Buffer %u bytes\n",