From: lkcl Date: Mon, 16 Aug 2021 15:25:44 +0000 (+0100) Subject: (no commit message) X-Git-Tag: DRAFT_SVP64_0_1~427 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=21acd0bb1a8d692cad4394fdc5fd630f77a44f9a;p=libreriscv.git --- diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn index e34f40a4b..a145e3612 100644 --- a/openpower/sv/branches.mdwn +++ b/openpower/sv/branches.mdwn @@ -16,14 +16,18 @@ Links * [[openpower/isa/branch]] Scalar 3.0B Branch Conditional operations, `bc`, `bctar` etc. test a -Condition Register. When doing so in a Vector Context, it is quite -reasonable and logical to test and Branch on a *Vector* of CR Fields +Condition Register. However for parallel processing it is simply impossible +to perform multiple independent branches: the Program Counter simply +cannot branch to multiple destinations based on multiple conditions. +The best that can be done is +to test multiple Conditions and make a decision of a *single* branch, +based on analysis of a *Vector* of CR Fields which have just been calculated from a *Vector* of results. In 3D Shader binaries, which are inherently parallelised and predicated, testing all or some results and branching based on multiple tests is extremely common, and a fundamental part of Shader Compilers. Therefore, `sv.bc` and other Vector-aware Branch Conditional instructions are a high priority -for 3D GPUs. +for 3D GPU workloads. The `BI` field of Branch Conditional operations is five bits, in scalar v3.0B this would select one bit of the 32 bit CR. In SVP64 there are @@ -32,7 +36,7 @@ v3.0B this would select one bit of the 32 bit CR. In SVP64 there are are extended to either scalar or vector and to select CR Fields 0..127 as specified in SVP64 [[sv/svp64/appendix]]. -When considering an "array" of branches, there are four useful modes: +When considering an "array" of branch-tests, there are four useful modes: AND, OR, NAND and NOR of all Conditions. NAND and NOR may be synthesised by inverting `BO[2]` which just leaves two modes: