From: Alexandre Oliva Date: Tue, 2 Feb 2021 03:31:40 +0000 (-0300) Subject: prepare to renumber ppc fp and vec regs X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=21d38c21e4ed32a9628116fe0c27774fcc506ff8;p=gcc.git prepare to renumber ppc fp and vec regs --- diff --git a/gcc/config/rs6000/rs6000-logue.c b/gcc/config/rs6000/rs6000-logue.c index b0ac183ceff..f8a4faff174 100644 --- a/gcc/config/rs6000/rs6000-logue.c +++ b/gcc/config/rs6000/rs6000-logue.c @@ -130,7 +130,8 @@ first_reg_to_save (void) int first_reg; /* Find lowest numbered live register. */ - for (first_reg = 13; first_reg <= 31; first_reg++) + for (first_reg = FIRST_SAVED_GP_REGNO; first_reg <= LAST_GPR_REGNO; + first_reg++) if (save_reg_p (first_reg)) break; @@ -145,7 +146,8 @@ first_fp_reg_to_save (void) int first_reg; /* Find lowest numbered live register. */ - for (first_reg = 14 + 32; first_reg <= 63; first_reg++) + for (first_reg = FIRST_SAVED_FP_REGNO; first_reg <= LAST_FPR_REGNO; + first_reg++) if (save_reg_p (first_reg)) break; @@ -171,7 +173,7 @@ first_altivec_reg_to_save (void) return FIRST_ALTIVEC_REGNO + 20; /* Find lowest numbered live register. */ - for (i = FIRST_ALTIVEC_REGNO + 20; i <= LAST_ALTIVEC_REGNO; ++i) + for (i = FIRST_SAVED_ALTIVEC_REGNO; i <= LAST_ALTIVEC_REGNO; ++i) if (save_reg_p (i)) break; @@ -336,10 +338,10 @@ rs6000_savres_strategy (rs6000_stack_t *info, | SAVE_INLINE_GPRS | REST_INLINE_GPRS | SAVE_INLINE_VRS | REST_INLINE_VRS); - if (info->first_gp_reg_save == 32) + if (info->first_gp_reg_save == LAST_GPR_REGNO + 1) strategy |= SAVE_INLINE_GPRS | REST_INLINE_GPRS; - if (info->first_fp_reg_save == 64) + if (info->first_fp_reg_save == LAST_FPR_REGNO + 1) strategy |= SAVE_INLINE_FPRS | REST_INLINE_FPRS; if (info->first_altivec_reg_save == LAST_ALTIVEC_REGNO + 1) @@ -357,11 +359,11 @@ rs6000_savres_strategy (rs6000_stack_t *info, else { /* Prefer out-of-line restore if it will exit. */ - if (info->first_fp_reg_save > 61) + if (info->first_fp_reg_save > LAST_FPR_REGNO - 2) strategy |= SAVE_INLINE_FPRS; - if (info->first_gp_reg_save > 29) + if (info->first_gp_reg_save > LAST_GPR_REGNO - 2) { - if (info->first_fp_reg_save == 64) + if (info->first_fp_reg_save == LAST_FPR_REGNO + 1) strategy |= SAVE_INLINE_GPRS; else strategy |= SAVE_INLINE_GPRS | REST_INLINE_GPRS; @@ -372,9 +374,9 @@ rs6000_savres_strategy (rs6000_stack_t *info, } else if (DEFAULT_ABI == ABI_DARWIN) { - if (info->first_fp_reg_save > 60) + if (info->first_fp_reg_save > LAST_FPR_REGNO - 3) strategy |= SAVE_INLINE_FPRS | REST_INLINE_FPRS; - if (info->first_gp_reg_save > 29) + if (info->first_gp_reg_save > LAST_GPR_REGNO - 2) strategy |= SAVE_INLINE_GPRS | REST_INLINE_GPRS; strategy |= SAVE_INLINE_VRS | REST_INLINE_VRS; } @@ -382,7 +384,7 @@ rs6000_savres_strategy (rs6000_stack_t *info, { gcc_checking_assert (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2); if ((flag_shrink_wrap_separate && optimize_function_for_speed_p (cfun)) - || info->first_fp_reg_save > 61) + || info->first_fp_reg_save > LAST_FPR_REGNO - 2) strategy |= SAVE_INLINE_FPRS | REST_INLINE_FPRS; strategy |= SAVE_INLINE_GPRS | REST_INLINE_GPRS; strategy |= SAVE_INLINE_VRS | REST_INLINE_VRS; @@ -402,7 +404,7 @@ rs6000_savres_strategy (rs6000_stack_t *info, out-of-line register restore functions if a fixed reg is in the range of regs restored. */ if (!(strategy & REST_INLINE_FPRS)) - for (int i = info->first_fp_reg_save; i < 64; i++) + for (int i = info->first_fp_reg_save; i < LAST_FPR_REGNO + 1; i++) if (fixed_regs[i]) { strategy |= REST_INLINE_FPRS; @@ -415,7 +417,7 @@ rs6000_savres_strategy (rs6000_stack_t *info, out-of-line then we know we haven't skipped any fprs. */ if ((strategy & SAVE_INLINE_FPRS) && !(strategy & REST_INLINE_FPRS)) - for (int i = info->first_fp_reg_save; i < 64; i++) + for (int i = info->first_fp_reg_save; i < LAST_FPR_REGNO + 1; i++) if (!save_reg_p (i)) { strategy |= REST_INLINE_FPRS; @@ -451,13 +453,13 @@ rs6000_savres_strategy (rs6000_stack_t *info, if (TARGET_MULTIPLE && !TARGET_POWERPC64 - && info->first_gp_reg_save < 31 + && info->first_gp_reg_save < LAST_GPR_REGNO && !(flag_shrink_wrap && flag_shrink_wrap_separate && optimize_function_for_speed_p (cfun))) { int count = 0; - for (int i = info->first_gp_reg_save; i < 32; i++) + for (int i = info->first_gp_reg_save; i < LAST_GPR_REGNO + 1; i++) if (save_reg_p (i)) count++; @@ -483,7 +485,7 @@ rs6000_savres_strategy (rs6000_stack_t *info, "exit" out-of-line gpr restore if we have saved some fprs; In those cases it is advantageous to use load multiple when available. */ - if (info->first_fp_reg_save != 64 || !lr_save_p) + if (info->first_fp_reg_save != LAST_FPR_REGNO + 1 || !lr_save_p) strategy |= REST_INLINE_GPRS | REST_MULTIPLE; } } @@ -491,12 +493,12 @@ rs6000_savres_strategy (rs6000_stack_t *info, /* Using the "exit" out-of-line routine does not improve code size if using it would require lr to be saved and if only saving one or two gprs. */ - else if (!lr_save_p && info->first_gp_reg_save > 29) + else if (!lr_save_p && info->first_gp_reg_save > LAST_GPR_REGNO - 2) strategy |= SAVE_INLINE_GPRS | REST_INLINE_GPRS; /* Don't ever restore fixed regs. */ if ((strategy & (REST_INLINE_GPRS | REST_MULTIPLE)) != REST_INLINE_GPRS) - for (int i = info->first_gp_reg_save; i < 32; i++) + for (int i = info->first_gp_reg_save; i < LAST_GPR_REGNO + 1; i++) if (fixed_reg_p (i)) { strategy |= REST_INLINE_GPRS; @@ -511,7 +513,7 @@ rs6000_savres_strategy (rs6000_stack_t *info, we haven't skipped any gprs. */ if ((strategy & (SAVE_INLINE_GPRS | SAVE_MULTIPLE)) == SAVE_INLINE_GPRS && (strategy & (REST_INLINE_GPRS | REST_MULTIPLE)) != REST_INLINE_GPRS) - for (int i = info->first_gp_reg_save; i < 32; i++) + for (int i = info->first_gp_reg_save; i < LAST_GPR_REGNO + 1; i++) if (!save_reg_p (i)) { strategy |= REST_INLINE_GPRS; @@ -524,7 +526,7 @@ rs6000_savres_strategy (rs6000_stack_t *info, if (!(strategy & SAVE_INLINE_FPRS)) strategy |= SAVE_NOINLINE_FPRS_SAVES_LR; else if (!(strategy & SAVE_INLINE_GPRS) - && info->first_fp_reg_save == 64) + && info->first_fp_reg_save == LAST_FPR_REGNO + 1) strategy |= SAVE_NOINLINE_GPRS_SAVES_LR; } else if (TARGET_AIX && !(strategy & REST_INLINE_FPRS)) @@ -705,10 +707,10 @@ rs6000_stack_info (void) else first_gp = info->first_gp_reg_save; - info->gp_size = reg_size * (32 - first_gp); + info->gp_size = reg_size * (LAST_GPR_REGNO + 1 - first_gp); info->first_fp_reg_save = first_fp_reg_to_save (); - info->fp_size = 8 * (64 - info->first_fp_reg_save); + info->fp_size = 8 * (LAST_FPR_REGNO + 1 - info->first_fp_reg_save); info->first_altivec_reg_save = first_altivec_reg_to_save (); info->altivec_size = 16 * (LAST_ALTIVEC_REGNO + 1 @@ -948,10 +950,10 @@ debug_stack_info (rs6000_stack_t *info) if (TARGET_ALTIVEC_ABI) fprintf (stderr, "\tALTIVEC ABI extensions enabled.\n"); - if (info->first_gp_reg_save != 32) + if (info->first_gp_reg_save <= LAST_GPR_REGNO) fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save); - if (info->first_fp_reg_save != 64) + if (info->first_fp_reg_save <= LAST_FPR_REGNO) fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save); if (info->first_altivec_reg_save <= LAST_ALTIVEC_REGNO) @@ -1697,7 +1699,7 @@ rs6000_emit_allocate_stack (HOST_WIDE_INT size, rtx copy_reg, int copy_off) { if (REG_P (stack_limit_rtx) && REGNO (stack_limit_rtx) > 1 - && REGNO (stack_limit_rtx) <= 31) + && REGNO (stack_limit_rtx) <= LAST_GPR_REGNO) { rtx_insn *insn = gen_add3_insn (tmp_reg, stack_limit_rtx, GEN_INT (size)); @@ -2178,7 +2180,7 @@ gen_frame_mem_offset (machine_mode mode, rtx reg, int offset) /* It's really GPR 13 or 14, FPR 14 and VR 20. We need the smallest. */ #define FIRST_SAVRES_REGISTER FIRST_SAVED_GP_REGNO -#define LAST_SAVRES_REGISTER 31 +#define LAST_SAVRES_REGISTER LAST_GPR_REGNO #define N_SAVRES_REGISTERS (LAST_SAVRES_REGISTER - FIRST_SAVRES_REGISTER + 1) enum { @@ -2313,7 +2315,7 @@ rs6000_savres_routine_sym (rs6000_stack_t *info, int sel) int regno = ((sel & SAVRES_REG) == SAVRES_GPR ? info->first_gp_reg_save : (sel & SAVRES_REG) == SAVRES_FPR - ? info->first_fp_reg_save - 32 + ? info->first_fp_reg_save - FIRST_FPR_REGNO : (sel & SAVRES_REG) == SAVRES_VR ? info->first_altivec_reg_save - FIRST_ALTIVEC_REGNO : -1); @@ -2412,9 +2414,9 @@ rs6000_emit_savres_rtx (rs6000_stack_t *info, ? info->first_altivec_reg_save : -1); end_reg = ((sel & SAVRES_REG) == SAVRES_GPR - ? 32 + ? LAST_GPR_REGNO + 1 : (sel & SAVRES_REG) == SAVRES_FPR - ? 64 + ? LAST_FPR_REGNO + 1 : (sel & SAVRES_REG) == SAVRES_VR ? LAST_ALTIVEC_REGNO + 1 : -1); @@ -2593,7 +2595,7 @@ rs6000_get_separate_components (void) Components 13..31 are the save/restore of GPR13..GPR31. Components 46..63 are the save/restore of FPR14..FPR31. */ - cfun->machine->n_components = 64; + cfun->machine->n_components = LAST_FPR_REGNO + 1; sbitmap components = sbitmap_alloc (cfun->machine->n_components); bitmap_clear (components); @@ -2609,7 +2611,8 @@ rs6000_get_separate_components (void) if (info->push_p) offset += info->total_size; - for (unsigned regno = info->first_gp_reg_save; regno < 32; regno++) + for (unsigned regno = info->first_gp_reg_save; + regno < LAST_GPR_REGNO + 1; regno++) { if (IN_RANGE (offset, -0x8000, 0x7fff) && save_reg_p (regno)) @@ -2637,7 +2640,8 @@ rs6000_get_separate_components (void) if (info->push_p) offset += info->total_size; - for (unsigned regno = info->first_fp_reg_save; regno < 64; regno++) + for (unsigned regno = info->first_fp_reg_save; + regno < LAST_FPR_REGNO + 1; regno++) { if (IN_RANGE (offset, -0x8000, 0x7fff) && save_reg_p (regno)) bitmap_set_bit (components, regno); @@ -2687,14 +2691,16 @@ rs6000_components_for_bb (basic_block bb) /* A register is used in a bb if it is in the IN, GEN, or KILL sets. */ /* GPRs. */ - for (unsigned regno = info->first_gp_reg_save; regno < 32; regno++) + for (unsigned regno = info->first_gp_reg_save; + regno < LAST_GPR_REGNO + 1; regno++) if (bitmap_bit_p (in, regno) || bitmap_bit_p (gen, regno) || bitmap_bit_p (kill, regno)) bitmap_set_bit (components, regno); /* FPRs. */ - for (unsigned regno = info->first_fp_reg_save; regno < 64; regno++) + for (unsigned regno = info->first_fp_reg_save; + regno < LAST_FPR_REGNO + 1; regno++) if (bitmap_bit_p (in, regno) || bitmap_bit_p (gen, regno) || bitmap_bit_p (kill, regno)) @@ -2778,7 +2784,7 @@ rs6000_emit_prologue_components (sbitmap components) if (info->push_p) offset += info->total_size; - for (int i = info->first_gp_reg_save; i < 32; i++) + for (int i = info->first_gp_reg_save; i < LAST_GPR_REGNO + 1; i++) { if (bitmap_bit_p (components, i)) { @@ -2797,7 +2803,7 @@ rs6000_emit_prologue_components (sbitmap components) if (info->push_p) offset += info->total_size; - for (int i = info->first_fp_reg_save; i < 64; i++) + for (int i = info->first_fp_reg_save; i < LAST_FPR_REGNO + 1; i++) { if (bitmap_bit_p (components, i)) { @@ -2832,7 +2838,7 @@ rs6000_emit_epilogue_components (sbitmap components) if (info->push_p) offset += info->total_size; - for (int i = info->first_fp_reg_save; i < 64; i++) + for (int i = info->first_fp_reg_save; i < LAST_FPR_REGNO + 1; i++) { if (bitmap_bit_p (components, i)) { @@ -2850,7 +2856,7 @@ rs6000_emit_epilogue_components (sbitmap components) if (info->push_p) offset += info->total_size; - for (int i = info->first_gp_reg_save; i < 32; i++) + for (int i = info->first_gp_reg_save; i < LAST_GPR_REGNO + 1; i++) { if (bitmap_bit_p (components, i)) { @@ -2886,13 +2892,13 @@ rs6000_set_handled_components (sbitmap components) { rs6000_stack_t *info = rs6000_stack_info (); - for (int i = info->first_gp_reg_save; i < 32; i++) + for (int i = info->first_gp_reg_save; i < LAST_GPR_REGNO + 1; i++) if (bitmap_bit_p (components, i)) cfun->machine->gpr_is_wrapped_separately[i] = true; - for (int i = info->first_fp_reg_save; i < 64; i++) + for (int i = info->first_fp_reg_save; i < LAST_FPR_REGNO + 1; i++) if (bitmap_bit_p (components, i)) - cfun->machine->fpr_is_wrapped_separately[i - 32] = true; + cfun->machine->fpr_is_wrapped_separately[i - FIRST_FPR_REGNO] = true; if (bitmap_bit_p (components, 0)) cfun->machine->lr_is_wrapped_separately = true; @@ -3115,8 +3121,8 @@ rs6000_emit_prologue (void) /* Preserve CR2 for save_world prologues */ sz = 5; - sz += 32 - info->first_gp_reg_save; - sz += 64 - info->first_fp_reg_save; + sz += LAST_GPR_REGNO + 1 - info->first_gp_reg_save; + sz += LAST_FPR_REGNO + 1 - info->first_fp_reg_save; sz += LAST_ALTIVEC_REGNO - info->first_altivec_reg_save + 1; p = rtvec_alloc (sz); j = 0; @@ -3126,7 +3132,7 @@ rs6000_emit_prologue (void) "*save_world")); /* We do floats first so that the instruction pattern matches properly. */ - for (i = 0; i < 64 - info->first_fp_reg_save; i++) + for (i = 0; i < LAST_FPR_REGNO + 1 - info->first_fp_reg_save; i++) RTVEC_ELT (p, j++) = gen_frame_store (gen_rtx_REG (TARGET_HARD_FLOAT ? DFmode : SFmode, info->first_fp_reg_save + i), @@ -3138,7 +3144,7 @@ rs6000_emit_prologue (void) info->first_altivec_reg_save + i), frame_reg_rtx, info->altivec_save_offset + frame_off + 16 * i); - for (i = 0; i < 32 - info->first_gp_reg_save; i++) + for (i = 0; i < LAST_GPR_REGNO + 1 - info->first_gp_reg_save; i++) RTVEC_ELT (p, j++) = gen_frame_store (gen_rtx_REG (reg_mode, info->first_gp_reg_save + i), frame_reg_rtx, @@ -3186,8 +3192,8 @@ rs6000_emit_prologue (void) ptr_regno = 11; else if (info->cr_save_p || info->lr_save_p - || info->first_fp_reg_save < 64 - || info->first_gp_reg_save < 32 + || info->first_fp_reg_save < LAST_FPR_REGNO + 1 + || info->first_gp_reg_save < LAST_GPR_REGNO + 1 || info->altivec_size != 0 || info->vrsave_size != 0 || crtl->calls_eh_return) @@ -3210,7 +3216,8 @@ rs6000_emit_prologue (void) frame_reg_rtx = ptr_reg; if (!(strategy & SAVE_INLINE_FPRS) && info->fp_size != 0) gcc_checking_assert (info->fp_save_offset + info->fp_size == 0); - else if (!(strategy & SAVE_INLINE_GPRS) && info->first_gp_reg_save < 32) + else if (!(strategy & SAVE_INLINE_GPRS) + && info->first_gp_reg_save < LAST_GPR_REGNO + 1) ptr_off = info->gp_save_offset + info->gp_size; else if (!(strategy & SAVE_INLINE_VRS) && info->altivec_size != 0) ptr_off = info->altivec_save_offset + info->altivec_size; @@ -3274,17 +3281,18 @@ rs6000_emit_prologue (void) if (!WORLD_SAVE_P (info) && (strategy & SAVE_INLINE_FPRS)) { int offset = info->fp_save_offset + frame_off; - for (int i = info->first_fp_reg_save; i < 64; i++) + for (int i = info->first_fp_reg_save; i < LAST_FPR_REGNO + 1; i++) { if (save_reg_p (i) - && !cfun->machine->fpr_is_wrapped_separately[i - 32]) + && !cfun->machine->fpr_is_wrapped_separately[i - FIRST_FPR_REGNO]) emit_frame_save (frame_reg_rtx, fp_reg_mode, i, offset, sp_off - frame_off); offset += fp_reg_size; } } - else if (!WORLD_SAVE_P (info) && info->first_fp_reg_save != 64) + else if (!WORLD_SAVE_P (info) + && info->first_fp_reg_save != LAST_FPR_REGNO + 1) { bool lr = (strategy & SAVE_NOINLINE_FPRS_SAVES_LR) != 0; int sel = SAVRES_SAVE | SAVRES_FPR | (lr ? SAVRES_LR : 0); @@ -3357,8 +3365,8 @@ rs6000_emit_prologue (void) { rtvec p; int i; - p = rtvec_alloc (32 - info->first_gp_reg_save); - for (i = 0; i < 32 - info->first_gp_reg_save; i++) + p = rtvec_alloc (LAST_GPR_REGNO + 1 - info->first_gp_reg_save); + for (i = 0; i < LAST_GPR_REGNO + 1 - info->first_gp_reg_save; i++) RTVEC_ELT (p, i) = gen_frame_store (gen_rtx_REG (reg_mode, info->first_gp_reg_save + i), frame_reg_rtx, @@ -3370,7 +3378,7 @@ rs6000_emit_prologue (void) else if (!WORLD_SAVE_P (info)) { int offset = info->gp_save_offset + frame_off; - for (int i = info->first_gp_reg_save; i < 32; i++) + for (int i = info->first_gp_reg_save; i < LAST_GPR_REGNO + 1; i++) { if (save_reg_p (i) && !cfun->machine->gpr_is_wrapped_separately[i]) @@ -3880,12 +3888,12 @@ rs6000_output_savres_externs (FILE *file) /* Write .extern for any function we will call to save and restore fp values. */ - if (info->first_fp_reg_save < 64 + if (info->first_fp_reg_save < LAST_FPR_REGNO + 1 && !TARGET_MACHO && !TARGET_ELF) { char *name; - int regno = info->first_fp_reg_save - 32; + int regno = info->first_fp_reg_save - FIRST_FPR_REGNO; if ((info->savres_strategy & SAVE_INLINE_FPRS) == 0) { @@ -4272,7 +4280,7 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) && (restoring_FPRs_inline || (strategy & REST_NOINLINE_FPRS_DOESNT_RESTORE_LR)) && (restoring_GPRs_inline - || info->first_fp_reg_save < 64) + || info->first_fp_reg_save < LAST_FPR_REGNO + 1) && !cfun->machine->lr_is_wrapped_separately); @@ -4289,9 +4297,9 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) rtvec p; p = rtvec_alloc (9 - + 32 - info->first_gp_reg_save + + LAST_GPR_REGNO + 1 - info->first_gp_reg_save + LAST_ALTIVEC_REGNO + 1 - info->first_altivec_reg_save - + 63 + 1 - info->first_fp_reg_save); + + LAST_FPR_REGNO + 1 - info->first_fp_reg_save); const char *rname; switch (epilogue_type) @@ -4331,7 +4339,7 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) } int i; - for (i = 0; i < 32 - info->first_gp_reg_save; i++) + for (i = 0; i < LAST_GPR_REGNO + 1 - info->first_gp_reg_save; i++) { rtx reg = gen_rtx_REG (reg_mode, info->first_gp_reg_save + i); RTVEC_ELT (p, j++) @@ -4351,7 +4359,7 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) && save_reg_p (info->first_altivec_reg_save + i)) cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg, cfa_restores); } - for (i = 0; info->first_fp_reg_save + i <= 63; i++) + for (i = 0; info->first_fp_reg_save + i <= LAST_FPR_REGNO; i++) { rtx reg = gen_rtx_REG (TARGET_HARD_FLOAT ? DFmode : SFmode, info->first_fp_reg_save + i); @@ -4717,7 +4725,7 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) location. */ bool exit_func = (!restoring_FPRs_inline || (!restoring_GPRs_inline - && info->first_fp_reg_save == 64)); + && info->first_fp_reg_save == LAST_FPR_REGNO + 1)); /* In the ELFv2 ABI we need to restore all call-saved CR fields from *separate* slots if the routine calls __builtin_eh_return, so @@ -4846,8 +4854,8 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) else if (using_load_multiple) { rtvec p; - p = rtvec_alloc (32 - info->first_gp_reg_save); - for (i = 0; i < 32 - info->first_gp_reg_save; i++) + p = rtvec_alloc (LAST_GPR_REGNO + 1 - info->first_gp_reg_save); + for (i = 0; i < LAST_GPR_REGNO + 1 - info->first_gp_reg_save; i++) RTVEC_ELT (p, i) = gen_frame_load (gen_rtx_REG (reg_mode, info->first_gp_reg_save + i), frame_reg_rtx, @@ -4857,7 +4865,7 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) else { int offset = info->gp_save_offset + frame_off; - for (i = info->first_gp_reg_save; i < 32; i++) + for (i = info->first_gp_reg_save; i < LAST_GPR_REGNO + 1; i++) { if (save_reg_p (i) && !cfun->machine->gpr_is_wrapped_separately[i]) @@ -4898,10 +4906,10 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) restores. */ if (flag_shrink_wrap && !restoring_GPRs_inline - && info->first_fp_reg_save == 64) + && info->first_fp_reg_save == LAST_FPR_REGNO + 1) cfa_restores = add_crlr_cfa_restore (info, cfa_restores); - for (i = info->first_gp_reg_save; i < 32; i++) + for (i = info->first_gp_reg_save; i < LAST_GPR_REGNO + 1; i++) if (save_reg_p (i) && !cfun->machine->gpr_is_wrapped_separately[i]) { @@ -4911,7 +4919,7 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) } if (!restoring_GPRs_inline - && info->first_fp_reg_save == 64) + && info->first_fp_reg_save == LAST_FPR_REGNO + 1) { /* We are jumping to an out-of-line function. */ if (cfa_restores) @@ -4929,10 +4937,10 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) if (restoring_FPRs_inline) { int offset = info->fp_save_offset + frame_off; - for (i = info->first_fp_reg_save; i < 64; i++) + for (i = info->first_fp_reg_save; i < LAST_FPR_REGNO + 1; i++) { if (save_reg_p (i) - && !cfun->machine->fpr_is_wrapped_separately[i - 32]) + && !cfun->machine->fpr_is_wrapped_separately[i - FIRST_FPR_REGNO]) { rtx reg = gen_rtx_REG (fp_reg_mode, i); emit_insn (gen_frame_load (reg, frame_reg_rtx, offset)); @@ -5008,7 +5016,8 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) if (epilogue_type != EPILOGUE_TYPE_SIBCALL && !restoring_FPRs_inline) { bool lr = (strategy & REST_NOINLINE_FPRS_DOESNT_RESTORE_LR) == 0; - rtvec p = rtvec_alloc (3 + !!lr + 64 - info->first_fp_reg_save); + rtvec p = rtvec_alloc (3 + !!lr + + LAST_FPR_REGNO + 1 - info->first_fp_reg_save); int elt = 0; RTVEC_ELT (p, elt++) = ret_rtx; if (lr) @@ -5028,7 +5037,7 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type) reg = (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)? 1 : 11; RTVEC_ELT (p, elt++) = gen_rtx_USE (VOIDmode, gen_rtx_REG (Pmode, reg)); - for (i = 0; i < 64 - info->first_fp_reg_save; i++) + for (i = 0; i < LAST_FPR_REGNO + 1 - info->first_fp_reg_save; i++) { rtx reg = gen_rtx_REG (DFmode, info->first_fp_reg_save + i); @@ -5295,7 +5304,8 @@ rs6000_output_function_epilogue (FILE *file) function logs/aborts fp operations. */ /* Assume that fp operations are used if any fp reg must be saved. */ fprintf (file, "%d,", - (optional_tbtab << 5) | ((info->first_fp_reg_save != 64) << 1)); + (optional_tbtab << 5) | ((info->first_fp_reg_save + != LAST_FPR_REGNO + 1) << 1)); /* 6 bitfields: function is interrupt handler, name present in proc table, function calls alloca, on condition directives @@ -5312,10 +5322,11 @@ rs6000_output_function_epilogue (FILE *file) /* 3 bitfields: saves backchain, fixup code, number of fpr saved (6 bits). */ fprintf (file, "%d,", - (info->push_p << 7) | (64 - info->first_fp_reg_save)); + (info->push_p << 7) | (LAST_FPR_REGNO + 1 + - info->first_fp_reg_save)); /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */ - fprintf (file, "%d,", (32 - first_reg_to_save ())); + fprintf (file, "%d,", (LAST_GPR_REGNO + 1 - first_reg_to_save ())); if (optional_tbtab) { diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index ec068c58aa5..108a01990f9 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -2742,16 +2742,16 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p) int align32; /* Precalculate REGNO_REG_CLASS. */ - rs6000_regno_regclass[0] = GENERAL_REGS; - for (r = 1; r < 32; ++r) + for (r = 0; HARD_REGISTER_NUM_P (r); ++r) + rs6000_regno_regclass[r] = NO_REGS; + + rs6000_regno_regclass[FIRST_GPR_REGNO] = GENERAL_REGS; + for (r = FIRST_GPR_REGNO + 1; r <= LAST_GPR_REGNO; ++r) rs6000_regno_regclass[r] = BASE_REGS; - for (r = 32; r < 64; ++r) + for (r = FIRST_FPR_REGNO; r <= LAST_FPR_REGNO; ++r) rs6000_regno_regclass[r] = FLOAT_REGS; - for (r = 64; HARD_REGISTER_NUM_P (r); ++r) - rs6000_regno_regclass[r] = NO_REGS; - for (r = FIRST_ALTIVEC_REGNO; r <= LAST_ALTIVEC_REGNO; ++r) rs6000_regno_regclass[r] = ALTIVEC_REGS; @@ -5846,8 +5846,8 @@ direct_return (void) { rs6000_stack_t *info = rs6000_stack_info (); - if (info->first_gp_reg_save == 32 - && info->first_fp_reg_save == 64 + if (info->first_gp_reg_save == LAST_GPR_REGNO + 1 + && info->first_fp_reg_save == LAST_FPR_REGNO + 1 && info->first_altivec_reg_save == LAST_ALTIVEC_REGNO + 1 && ! info->lr_save_p && ! info->cr_save_p @@ -9783,7 +9783,7 @@ rs6000_conditional_register_usage (void) /* Conditionally disable FPRs. */ if (TARGET_SOFT_FLOAT) - for (i = 32; i < 64; i++) + for (i = FIRST_FPR_REGNO; i <= LAST_FPR_REGNO; i++) fixed_regs[i] = call_used_regs[i] = 1; /* The TOC register is not killed across calls in a way that is @@ -13613,7 +13613,7 @@ print_operand (FILE *file, rtx x, int code) /* The operand must be an indirect memory reference. The result is the register name. */ if (!MEM_P (x) || !REG_P (XEXP (x, 0)) - || REGNO (XEXP (x, 0)) >= 32) + || REGNO (XEXP (x, 0)) > LAST_GPR_REGNO) output_operand_lossage ("invalid %%P value"); else fputs (reg_names[REGNO (XEXP (x, 0))], file); @@ -13798,8 +13798,9 @@ print_operand (FILE *file, rtx x, int code) { int reg = REGNO (x); int vsx_reg = (FP_REGNO_P (reg) - ? reg - 32 - : reg - FIRST_ALTIVEC_REGNO + 32); + ? reg - FIRST_FPR_REGNO + : (reg - FIRST_ALTIVEC_REGNO + + (LAST_FPR_REGNO - FIRST_FPR_REGNO + 1))); #ifdef TARGET_REGNAMES if (TARGET_REGNAMES) @@ -22225,10 +22226,10 @@ rs6000_memory_move_cost (machine_mode mode, reg_class_t rclass, dbg_cost_ctrl++; if (reg_classes_intersect_p (rclass, GENERAL_REGS)) - ret = 4 * hard_regno_nregs (0, mode); + ret = 4 * hard_regno_nregs (FIRST_GPR_REGNO, mode); else if ((reg_classes_intersect_p (rclass, FLOAT_REGS) || reg_classes_intersect_p (rclass, VSX_REGS))) - ret = 4 * hard_regno_nregs (32, mode); + ret = 4 * hard_regno_nregs (FIRST_FPR_REGNO, mode); else if (reg_classes_intersect_p (rclass, ALTIVEC_REGS)) ret = 4 * hard_regno_nregs (FIRST_ALTIVEC_REGNO, mode); else @@ -23522,7 +23523,7 @@ rs6000_dbx_register_number (unsigned int regno, unsigned int format) if ((format == 0 && write_symbols == DWARF2_DEBUG) || format == 1) { #ifdef RS6000_USE_DWARF_NUMBERING - if (regno <= 31) + if (regno <= LAST_GPR_REGNO) return regno; if (FP_REGNO_P (regno)) return regno - FIRST_FPR_REGNO + 32; @@ -23552,7 +23553,7 @@ rs6000_dbx_register_number (unsigned int regno, unsigned int format) return 111; if (regno == ARG_POINTER_REGNUM) return 67; - if (regno == 64) + if (regno == FIRST_ALTIVEC_REGNO) return 100; gcc_unreachable (); @@ -23562,7 +23563,7 @@ rs6000_dbx_register_number (unsigned int regno, unsigned int format) /* We use the GCC 7 (and before) internal number for non-DWARF debug information, and also for .eh_frame. */ /* Translate the regnos to their numbers in GCC 7 (and before). */ - if (regno <= 31) + if (regno <= LAST_GPR_REGNO) return regno; if (FP_REGNO_P (regno)) return regno - FIRST_FPR_REGNO + 32; @@ -23585,7 +23586,7 @@ rs6000_dbx_register_number (unsigned int regno, unsigned int format) return 111; if (regno == ARG_POINTER_REGNUM) return 67; - if (regno == 64) + if (regno == FIRST_ALTIVEC_REGNO) return 64; gcc_unreachable (); diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 233a92baf3c..c1c95cbf1b7 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -904,7 +904,7 @@ enum data_align { align_abi, align_opt, align_both }; #define TOTAL_ALTIVEC_REGS (LAST_ALTIVEC_REGNO - FIRST_ALTIVEC_REGNO + 1) #define FIRST_SAVED_ALTIVEC_REGNO (FIRST_ALTIVEC_REGNO+20) -#define FIRST_SAVED_FP_REGNO (14+32) +#define FIRST_SAVED_FP_REGNO (14+FIRST_FPR_REGNO) #define FIRST_SAVED_GP_REGNO (FIXED_R13 ? 14 : 13) /* List the order in which to allocate registers. Each register must be @@ -982,7 +982,7 @@ enum data_align { align_abi, align_opt, align_both }; } /* True if register is floating-point. */ -#define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63) +#define FP_REGNO_P(N) ((N) >= FIRST_FPR_REGNO && (N) <= LAST_FPR_REGNO) /* True if register is a condition register. */ #define CR_REGNO_P(N) ((N) >= CR0_REGNO && (N) <= CR7_REGNO) @@ -992,7 +992,7 @@ enum data_align { align_abi, align_opt, align_both }; /* True if register is an integer register. */ #define INT_REGNO_P(N) \ - ((N) <= 31 || (N) == ARG_POINTER_REGNUM || (N) == FRAME_POINTER_REGNUM) + ((N) <= LAST_GPR_REGNO || (N) == ARG_POINTER_REGNUM || (N) == FRAME_POINTER_REGNUM) /* True if register is the CA register. */ #define CA_REGNO_P(N) ((N) == CA_REGNO) @@ -1087,10 +1087,10 @@ enum data_align { align_abi, align_opt, align_both }; #define HARD_FRAME_POINTER_REGNUM 31 /* Base register for access to local variables of the function. */ -#define FRAME_POINTER_REGNUM 110 +// #define FRAME_POINTER_REGNUM 110 /* Base register for access to arguments of the function. */ -#define ARG_POINTER_REGNUM 99 +// #define ARG_POINTER_REGNUM 99 /* Place to put static chain when calling a function that requires it. */ #define STATIC_CHAIN_REGNUM 11 @@ -1433,14 +1433,14 @@ extern enum reg_class rs6000_constraints[RS6000_CONSTRAINT_MAX]; : LEVEL == SAVE_NONLOCAL ? (TARGET_32BIT ? DImode : PTImode) : Pmode) /* Minimum and maximum general purpose registers used to hold arguments. */ -#define GP_ARG_MIN_REG 3 -#define GP_ARG_MAX_REG 10 +#define GP_ARG_MIN_REG (FIRST_GPR_REGNO + 3) +#define GP_ARG_MAX_REG (FIRST_GPR_REGNO + 10) #define GP_ARG_NUM_REG (GP_ARG_MAX_REG - GP_ARG_MIN_REG + 1) /* Minimum and maximum floating point registers used to hold arguments. */ -#define FP_ARG_MIN_REG 33 -#define FP_ARG_AIX_MAX_REG 45 -#define FP_ARG_V4_MAX_REG 40 +#define FP_ARG_MIN_REG (FIRST_FPR_REGNO + 1) +#define FP_ARG_AIX_MAX_REG (FIRST_FPR_REGNO + 13) +#define FP_ARG_V4_MAX_REG (FIRST_FPR_REGNO + 8) #define FP_ARG_MAX_REG (DEFAULT_ABI == ABI_V4 \ ? FP_ARG_V4_MAX_REG : FP_ARG_AIX_MAX_REG) #define FP_ARG_NUM_REG (FP_ARG_MAX_REG - FP_ARG_MIN_REG + 1)