From: Jason Lowe-Power <jason@lowepower.com>
Date: Thu, 3 Sep 2020 15:21:14 +0000 (-0700)
Subject: cpu: Set ContextId on request from trace CPU
X-Git-Tag: v20.1.0.0~147
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=21df40497c89fba6a0c9d7138930c46937ef5fea;p=gem5.git

cpu: Set ContextId on request from trace CPU

Adds a contextId to the trace CPU in one more case that was missing.
Without this a panic is triggered in the cache.

Change-Id: I78bd70ad1e3657c9a6a1d56c234c007c2e2b586c
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34035
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
---

diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc
index dd9125737..13f194c84 100644
--- a/src/cpu/trace/trace_cpu.cc
+++ b/src/cpu/trace/trace_cpu.cc
@@ -653,6 +653,9 @@ TraceCPU::ElasticDataGen::executeMemReq(GraphNode* node_ptr)
         node_ptr->physAddr, node_ptr->size, node_ptr->flags, masterID);
     req->setReqInstSeqNum(node_ptr->seqNum);
 
+    // If this is not done it triggers assert in L1 cache for invalid contextId
+    req->setContext(ContextID(0));
+
     req->setPC(node_ptr->pc);
     // If virtual address is valid, set the virtual address field
     // of the request.